Dual-Mode PSK Transceiver on SDR With FPGA
☆56Oct 9, 2024Updated last year
Alternatives and similar repositories for sdr-psk-fpga
Users that are interested in sdr-psk-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA☆233Nov 29, 2023Updated 2 years ago
- FPGA based FM radio with traditional IF architecture and digital IQ demodulation☆22Oct 1, 2024Updated last year
- OTFS Modulation FPGA Implementation (Verilog Version)☆16Mar 25, 2025Updated last year
- NGSPICE Simulation of CMOS Circuits☆19Jun 6, 2023Updated 2 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆63May 18, 2019Updated 7 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- 基于MATLAB的OFDM仿真,包含了BPSK、QPSK、QAM调制方式和解调,以及AWGN高斯白噪声信道和TDL信道☆18Jan 31, 2024Updated 2 years ago
- ☆12Jul 29, 2016Updated 9 years ago
- 在FPGA端实现JPEG编码(开发中……☆13Oct 17, 2024Updated last year
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆24Nov 8, 2019Updated 6 years ago
- Verilog实现OFDM基带☆45Jan 22, 2016Updated 10 years ago
- BSc. Project (UoW) - simulation of GSM and EDGE network modulation schemes (GMSK and 8PSK)☆16Jan 7, 2020Updated 6 years ago
- 软件无线电,使用FPGA进行正交解调。☆23Feb 18, 2019Updated 7 years ago
- An open source GNSS receiver☆84Apr 7, 2026Updated last month
- RTL implementation of components for DVB-S2☆140May 25, 2026Updated last week
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- ☆17Jul 10, 2023Updated 2 years ago
- PYNQ-Z1 + AD936X openwifi capable SDR platform☆126Jul 7, 2025Updated 10 months ago
- Using Software Designed Radio to transmit & receive FM signal☆49Apr 2, 2018Updated 8 years ago
- [Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol☆19Feb 22, 2020Updated 6 years ago
- A project demonstrate how to config ad9361 to TX mode☆11Dec 9, 2018Updated 7 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- OpenHT FPGA design☆36Jun 24, 2024Updated last year
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19May 28, 2012Updated 14 years ago
- Release of PocketSDR NEO* edition schematics, PCB, and BOM in KICAD 7.0 format.☆13Jun 14, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- FPGA for uSDR☆23Apr 18, 2026Updated last month
- SpaceWire☆14Jul 17, 2014Updated 11 years ago
- A basic Soft(Gate)ware Defined Radio architecture☆102Jan 18, 2024Updated 2 years ago
- Generates simple AXI4-lite IP for use in Vivado from register specifications☆16Apr 11, 2025Updated last year
- The FPGA design for the FreeSRP's Artix 7 FPGA☆26Apr 12, 2017Updated 9 years ago
- A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.☆30May 14, 2020Updated 6 years ago
- Real-Time Hardware Sorter, Using A Multi-Dimensional Sorting Algorithm☆19Jan 4, 2026Updated 4 months ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆83Apr 28, 2023Updated 3 years ago
- Implementation of the DVBS2 standard using Matlab☆15Feb 17, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- USRP-N210 mixed FPGA/software implementation of an automated spectrum scanner☆21Nov 12, 2021Updated 4 years ago
- Formulas and constants from the 802.11 standards, in machine-readable formats☆14Sep 20, 2013Updated 12 years ago
- 基于ALINX-AX7020平台的Linux驱动开发学习。☆55Mar 27, 2020Updated 6 years ago
- This is the verilog code for the various FPGA in the OpenHPSDR Radios☆27May 4, 2026Updated 3 weeks ago
- OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing☆59Feb 22, 2026Updated 3 months ago
- Codes of different calibration routines: IMU vs CAMERA, CAMERA vs LASER, Ground truth camera vs earth's cs☆15Jan 28, 2014Updated 12 years ago
- QSPI flash support for Xilinx's Zynq devices☆28Jul 28, 2020Updated 5 years ago