Teddy-van-Jerry / sdr-psk-fpgaLinks
Dual-Mode PSK Transceiver on SDR With FPGA
☆38Updated 9 months ago
Alternatives and similar repositories for sdr-psk-fpga
Users that are interested in sdr-psk-fpga are comparing it to the libraries listed below
Sorting:
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆58Updated 6 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆50Updated 2 years ago
- Verilog实现OFDM基带☆44Updated 9 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆71Updated 2 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆109Updated last year
- IEEE 802.11 OFDM-based transceiver system☆34Updated 7 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆54Updated last year
- IEEE 802.16 OFDM-based transceiver system☆25Updated 5 years ago
- RTL implementation of components for DVB-S2☆121Updated 2 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆23Updated 5 years ago
- MATLAB toolbox for ADI transceiver products☆62Updated 3 months ago
- Reed Solomon Encoder and Decoder Digital IP☆21Updated 5 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆103Updated 2 years ago
- Python productivity for RFSoC platforms☆78Updated 3 weeks ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit GMSK☆15Updated 6 years ago
- MATLAB-based FIR filter design☆59Updated 10 months ago
- The implementation of AD9371 on KC705☆20Updated last month
- An RFSoC Frequency Planner developed using Python.☆29Updated 2 years ago
- HDL code for a complex multiplier with AXI stream Interface☆13Updated 2 years ago
- 用Verilog语言编写,实现2FSK,2PSK, 2DPSK, QPSK调制解调☆40Updated 6 years ago
- LTE/WiFi/5G-NR SDR Transceiver☆54Updated 6 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆30Updated 3 years ago
- A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC☆37Updated 10 months ago
- RFSoC2x2 board repo for PYNQ☆17Updated 2 years ago
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆48Updated 4 years ago
- ☆14Updated 7 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆116Updated this week
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19Updated 13 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆50Updated 2 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆61Updated 3 years ago