Alternatives and similar repositories for FEC:

Users that are interested in FEC are comparing it to the libraries listed below

• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆59Updated last year
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆97Updated last year
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆51Updated 11 months ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆54Updated 5 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆11Updated 4 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆50Updated 7 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆45Updated last year
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆37Updated 5 years ago
• OpenResearchInstitute / dvb_fpga
  RTL implementation of components for DVB-S2
  ☆113Updated last year
• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆12Updated 4 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆27Updated 10 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆26Updated 4 months ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆31Updated 7 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆42Updated 9 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆117Updated 2 years ago
• strath-sdr / RFSoC-Book
  Companion Jupyter Notebooks for the RFSoC-Book.
  ☆161Updated last year
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆17Updated 3 months ago
• ucb-ee290c / fa18-modem
  LTE/WiFi/5G-NR SDR Transceiver
  ☆52Updated 6 years ago
• open-sdr / openofdm
  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
  ☆107Updated last year
• winsonbook / Reed-Solomon-
  This repository contains verilog files to implement Reed Solomon encoding and decoding on FPGA. Each symbol is of 8 bits. Message length …
  ☆24Updated 5 years ago
• xdsopl / LDPC
  Playing with Low-density parity-check codes
  ☆91Updated last year
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆101Updated last year
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆19Updated 3 years ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆24Updated 5 years ago
• freecores / ha1588
  Hardware Assisted IEEE 1588 IP Core
  ☆26Updated 10 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆19Updated 4 years ago
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆47Updated 2 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆21Updated last year
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆17Updated 5 years ago