Alternatives and similar repositories for dvb_fpga

Users that are interested in dvb_fpga are comparing it to the libraries listed below

• daveshah1 / RFToolSDR
  AD9361 based USB3 SDR
  ☆118Updated 8 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆109Updated 2 years ago
• catkira / open5G_phy
  A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
  ☆215Updated 7 months ago
• srsran / zynq_timestamping
  Open source Zynq timestamping implementation from Software Radio Systems (SRS)
  ☆73Updated 2 years ago
• OpenResearchInstitute / DVB-receiver
  Work being done on the DVB-receiver for Phase 4 Ground.
  ☆59Updated 2 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆124Updated 2 weeks ago
• oscimp / oscimpDigital
  OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing
  ☆58Updated this week
• regymm / PYNQSDR
  PYNQ-Z1 + AD936X openwifi capable SDR platform
  ☆118Updated 5 months ago
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆84Updated last month
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆56Updated 2 years ago
• ZipCPU / sdr
  A basic Soft(Gate)ware Defined Radio architecture
  ☆100Updated last year
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆48Updated last year
• dawsonjon / FPGA-radio
  Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
  ☆111Updated 9 years ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆63Updated 3 weeks ago
• open-sdr / openofdm
  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.
  ☆125Updated 4 months ago
• MicroPhase / antsdr-pynq
  pynq framework for antsdr
  ☆36Updated last year
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆59Updated last year
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆25Updated last year
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 3 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆31Updated 2 years ago
• strath-sdr / rfsoc_studio
  The Strathclyde RFSoC Studio Installer for PYNQ.
  ☆34Updated 2 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆61Updated 6 years ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆87Updated last year
• dawsonjon / FPGA-TX
  FPGA based transmitter
  ☆99Updated 8 years ago
• MicroPhase / antsdr-fw
  ANTSDR Firmware
  ☆136Updated 2 years ago
• xdsopl / LDPC
  Playing with Low-density parity-check codes
  ☆98Updated 2 years ago
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆86Updated 2 years ago
• timcardenuto / testPlutoSDR
  ☆24Updated 5 years ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆124Updated 4 years ago
• analogdevicesinc / libad9361-iio
  IIO AD9361 library for filter design and handling, multi-chip sync, etc.
  ☆95Updated 2 months ago