Alternatives and similar repositories for wifi_ldpc_codec

Users that are interested in wifi_ldpc_codec are comparing it to the libraries listed below

• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 4 years ago
• liuguangxi / gng
  Gaussian noise generator Verilog IP core
  ☆31Updated 2 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆50Updated 7 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆14Updated 4 years ago
• srohit0 / CORDIC
  CORDIC VLSI-IP for deep learning activation functions
  ☆15Updated 5 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆54Updated last year
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆36Updated 3 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆67Updated 2 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 3 years ago
• JoseIuri / axi4lite2uart
  This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.
  ☆20Updated 6 years ago
• CodePurble / ldpc-fpga
  Playground for implementing LDPC codes on FPGA
  ☆16Updated 2 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆48Updated 6 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆30Updated 3 years ago
• freecores / ha1588
  Hardware Assisted IEEE 1588 IP Core
  ☆29Updated 10 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆59Updated 3 years ago
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆16Updated 8 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆23Updated 5 years ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆26Updated 6 years ago
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆10Updated 3 years ago
• louislxw / pe_array
  A linear array of PEs with RISC-V ISA targeting extreme high frequency on Xilinx ZYNQ Ultrascale+, specificially for applications such as…
  ☆10Updated last year
• freecores / reed_solomon_decoder
  Reed Solomon Decoder (204,188)
  ☆12Updated 10 years ago
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆19Updated 13 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆27Updated 10 years ago
• briansune / FFT-R22SDF
  R22SDF FFT VLSI/FPGA investigate and implementation
  ☆15Updated 3 years ago
• CospanDesign / vivado-ip-cores
  IP Cores that can be used within Vivado
  ☆26Updated 4 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• Elphel / eddr3
  mirror of https://git.elphel.com/Elphel/eddr3
  ☆40Updated 7 years ago
• suisuisi / basic_systemverilog
  Must-have verilog systemverilog modules
  ☆36Updated 3 years ago
• ishfaqahmed29 / SerDes
  Verilog RTL Design
  ☆39Updated 3 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆10Updated 4 years ago