Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
☆77Jan 29, 2017Updated 9 years ago
Alternatives and similar repositories for nfmac10g
Users that are interested in nfmac10g are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Distributed Accelerator OS☆68Apr 6, 2022Updated 4 years ago
- LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G☆41Apr 3, 2023Updated 3 years ago
- Ethernet 10GE MAC☆47Jul 17, 2014Updated 11 years ago
- 10 Gbit/s flexible and extensible Ethernet FPGA-based traffic generator☆11Oct 3, 2014Updated 11 years ago
- Semi-private RTL development upstream of OpenCPI - this is *not* the OpenCPI repo!☆25Oct 19, 2016Updated 9 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL☆180Jan 24, 2024Updated 2 years ago
- Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…☆18Aug 28, 2019Updated 6 years ago
- ☆14May 15, 2023Updated 3 years ago
- SystemVerilog-based UVM testbench for an Ethernet 10GE MAC core☆163Jul 16, 2018Updated 7 years ago
- Gateware for the Terasic/Arrow DECA board, to become a USB2 high speed audio interface☆22Feb 28, 2022Updated 4 years ago
- Verilog Ethernet components for FPGA implementation☆2,988Feb 27, 2025Updated last year
- Verilog PCI express components☆26Jun 26, 2023Updated 2 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Jul 17, 2014Updated 11 years ago
- Verilog Ethernet Switch (layer 2)☆57Oct 18, 2023Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Verilog FT245 to AXI stream interface☆29Jun 20, 2018Updated 7 years ago
- IP Cores that can be used within Vivado☆27May 18, 2021Updated 5 years ago
- Verilog network module. Models network traffic from pcap to AXI-Stream☆24Apr 24, 2021Updated 5 years ago
- Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)☆934Apr 15, 2026Updated 2 months ago
- FIR，FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- UART -> AXI Bridge☆76Jul 1, 2021Updated 4 years ago
- Implements a Gaussian Mixture model in JavaScript☆10Dec 3, 2021Updated 4 years ago
- Caribou: Distributed Smart Storage built with FPGAs☆71Jul 25, 2018Updated 7 years ago
- Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet☆29Feb 4, 2020Updated 6 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- TCP Offload Engine☆78Nov 18, 2017Updated 8 years ago
- This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).☆15May 16, 2021Updated 5 years ago
- ☆17Feb 9, 2023Updated 3 years ago
- Imaging application using MIPI and DisplayPort to process image☆25Feb 13, 2020Updated 6 years ago
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- Verilog RTL Implementation of DNN☆10Jun 26, 2018Updated 7 years ago
- AXI Stream UART (verilog)☆12Oct 3, 2019Updated 6 years ago
- UDP-IP stack accelerator and is able to send and receive data through Ethernet link☆48Nov 3, 2025Updated 7 months ago
- Open source FPGA-based NIC and platform for in-network compute☆2,358Jul 5, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 10Gb Ethernet Switch☆265Jun 6, 2026Updated last week
- Userspace DMA library for Zynq-based SoCs☆16Jan 22, 2019Updated 7 years ago
- A simple cycle-accurate DaDianNao simulator☆13Mar 27, 2019Updated 7 years ago
- A FPGA implementation of the NTP and NTS protocols☆65May 31, 2023Updated 3 years ago
- DDR4 Simulation Project in System Verilog☆46Aug 18, 2014Updated 11 years ago
- DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.☆41Feb 8, 2017Updated 9 years ago
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆138Sep 11, 2021Updated 4 years ago