forconesi / nfmac10gLinks
Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
☆72Updated 9 years ago
Alternatives and similar repositories for nfmac10g
Users that are interested in nfmac10g are comparing it to the libraries listed below
Sorting:
- Open source FPGA-based NIC and platform for in-network compute☆67Updated 5 months ago
- Verilog Content Addressable Memory Module☆115Updated 3 years ago
- Extensible FPGA control platform☆61Updated 2 years ago
- Ethernet 10GE MAC☆46Updated 11 years ago
- PCIe (1.0a to 2.0) Virtual Root Complex model, in C, co-simulating with Verilog, SystemVerilog and VHDL, with Endpoint capabilities☆132Updated last week
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- ☆80Updated 3 years ago
- ☆89Updated 8 years ago
- NVMe Controller featuring Hardware Acceleration☆101Updated 4 years ago
- Ethernet interface modules for Cocotb☆75Updated 5 months ago
- Fully parametrizable combinatorial parallel LFSR/CRC module☆160Updated 11 months ago
- Verilog based BCH encoder/decoder☆132Updated 3 years ago
- native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches☆46Updated 11 years ago
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆45Updated 2 years ago
- Verilog digital signal processing components☆170Updated 3 years ago
- Simple hash table on Verilog (SystemVerilog)☆51Updated 9 years ago
- Xilinx PCIe to MIG DDR4 example designs and custom part data files☆40Updated 2 years ago
- ☆28Updated 4 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆53Updated 2 years ago
- UART -> AXI Bridge☆70Updated 4 years ago
- RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.☆32Updated 2 years ago
- Hamming ECC Encoder and Decoder to protect memories☆34Updated last year
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆115Updated last week
- Verilog Ethernet Switch (layer 2)☆51Updated 2 years ago
- ☆36Updated 5 years ago
- Generates Makefiles to synthesize, place, and route verilog using Vivado☆97Updated 3 years ago
- Mathematical Functions in Verilog☆97Updated 4 years ago
- Ethernet switch implementation written in Verilog☆58Updated 2 years ago
- Generic FIFO implementation with optional FWFT☆61Updated 5 years ago
- IEEE P1735 decryptor for VHDL☆39Updated 10 years ago