forconesi / nfmac10g
Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
☆62Updated 8 years ago
Alternatives and similar repositories for nfmac10g:
Users that are interested in nfmac10g are comparing it to the libraries listed below
- Open source FPGA-based NIC and platform for in-network compute☆62Updated 6 months ago
- Hardware Assisted IEEE 1588 IP Core☆28Updated 10 years ago
- Ethernet 10GE MAC☆45Updated 10 years ago
- Verilog Content Addressable Memory Module☆104Updated 3 years ago
- Ethernet MAC 10/100 Mbps☆81Updated 5 years ago
- Ethernet switch implementation written in Verilog☆47Updated last year
- ☆55Updated 4 years ago
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆43Updated 2 years ago
- A simple DDR3 memory controller☆54Updated 2 years ago
- Hamming ECC Encoder and Decoder to protect memories☆32Updated 3 months ago
- Ethernet interface modules for Cocotb☆63Updated last year
- Verilog network module. Models network traffic from pcap to AXI-Stream☆23Updated 4 years ago
- ☆66Updated 3 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆42Updated 4 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- Extensible FPGA control platform☆60Updated 2 years ago
- ☆25Updated 3 years ago
- ☆59Updated 2 years ago
- native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches☆44Updated 10 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆44Updated 9 years ago
- Generic FIFO implementation with optional FWFT☆57Updated 4 years ago
- Verilog Ethernet components for FPGA implementation☆20Updated last year
- UART -> AXI Bridge☆61Updated 3 years ago
- DDR3 SDRAM controller☆18Updated 10 years ago
- ☆85Updated 8 years ago
- Groundhog - Serial ATA Host Bus Adapter☆22Updated 6 years ago
- Simple hash table on Verilog (SystemVerilog)☆49Updated 9 years ago
- 10G Low Latency Ethernet☆53Updated last year
- A look ahead, round-robing parametrized arbiter written in Verilog.☆42Updated 4 years ago
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆103Updated 3 years ago