This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).
☆15May 16, 2021Updated 5 years ago
Alternatives and similar repositories for UVMReference
Users that are interested in UVMReference are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Advanced Peripheral Bus (APB) UVM testbench project☆10Apr 9, 2017Updated 9 years ago
- a very simple risc_cpu verification demo with uvm☆27Apr 28, 2019Updated 7 years ago
- ☆30May 11, 2021Updated 5 years ago
- UVM verification platform for DW_apb_i2c IP core(Master Mode)☆13Aug 21, 2023Updated 2 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆40Nov 24, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆19Aug 11, 2022Updated 3 years ago
- 包括同步FIFO（输入输出位宽相同），异步FIFO（输入输出位宽相同），异步FIFO（能实现输出数据位宽是输入数据位宽的1/2或2倍）☆25Nov 7, 2022Updated 3 years ago
- 100G Udp Link For axi Stream☆17Jun 27, 2023Updated 3 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆69Mar 15, 2022Updated 4 years ago
- An uvm verification env for ahb2apb bridge☆58Apr 9, 2021Updated 5 years ago
- Matlab codes for the paper “Distributed multi-stream beamforming in MIMO multi-relay interference networks,” by C. M. Yetis and R. Y. Cha…☆14Feb 9, 2025Updated last year
- Built a test environment using UVM Methodology to verify APB Protocol.☆16Feb 6, 2019Updated 7 years ago
- MATLAB simulation code for dissertation project report☆14Sep 4, 2022Updated 3 years ago
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件，并在 ARM＋FPGA 完成项目部署，实现通过摄取图片并通过 ARM＋FPGA 综合部署和加速识别算法，并通过显示驱动，在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆26Mar 8, 2026Updated 4 months ago
- 『컴퓨터 시스템 딥 다이브』(한빛미디어, 2023) 예제 코드 저장소입니다.☆10Dec 28, 2023Updated 2 years ago
- CORE-V MCU UVM Environment and Test Bench☆26Jul 19, 2024Updated 2 years ago
- DDR5 PHY Graduation project (Verification Team) under supervision of Si-Vision☆86Mar 21, 2024Updated 2 years ago
- Transforming RIS-Assidted Passive Beamforming from Tedious to Simple: A Relaxation Algorithm for Ricain Channel☆12Nov 10, 2022Updated 3 years ago
- 基于FPGA的MIPS架构的CPU设计☆30Aug 14, 2015Updated 10 years ago
- This project is AHB_SRAM design based on 启芯学堂,which contains all the source files.☆15Mar 13, 2022Updated 4 years ago
- This is verification project that we are writing SystemVerilog code to verify 8/16/32 bit SDRAM Controller Which is Originally developed …☆32Mar 26, 2017Updated 9 years ago
- ☆16Sep 26, 2022Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Precise Point Positioning Library☆11Dec 2, 2020Updated 5 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆31Jun 1, 2022Updated 4 years ago
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆134Jul 22, 2021Updated 5 years ago
- A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA.☆19Jul 29, 2015Updated 10 years ago
- Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence☆41Jun 24, 2020Updated 6 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Jul 17, 2014Updated 12 years ago
- A Framework for Design and Verification of Image Processing Applications using UVM☆120Nov 27, 2017Updated 8 years ago
- AXI4 BFM in Verilog☆37Dec 13, 2016Updated 9 years ago
- ☆37Mar 3, 2016Updated 10 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Matlab code of the paper: N. T. Do, D. B. da Costa, T. Q. Duong, V. N. Q. Bao, and B. An, “Exploiting direct links in multiuser multirela…☆18Mar 3, 2022Updated 4 years ago
- ☆51Nov 3, 2023Updated 2 years ago
- Cortex-M0 DesignStart Wrapper☆24Aug 11, 2019Updated 6 years ago
- Xilinx AXI VIP example of use☆44Apr 24, 2021Updated 5 years ago
- AMBA AHB 2.0 VIP in SystemVerilog UVM☆160Mar 31, 2020Updated 6 years ago
- DLB (Deep Learning Blocks) as a part of DPU (Deep Learning Processing Unit) is a collection of synthesizable Verilog modules for deep lea…☆22Aug 13, 2025Updated 11 months ago
- A UVM verification with a APB BFM (Bus functional model), connected to two write-only DAC and two read-only ADC slaves. The sequence gene…☆17Jul 7, 2018Updated 8 years ago