Alternatives and similar repositories for TOE:

Users that are interested in TOE are comparing it to the libraries listed below

• johan92 / fpga-hash-table
  Simple hash table on Verilog (SystemVerilog)
  ☆48Updated 9 years ago
• aquaxis / gemac
  Gigabit MAC + UDP/TCP/IP offload Engine
  ☆31Updated 5 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆62Updated 5 months ago
• d953i / Custom_Part_Data_Files
  Xilinx PCIe to MIG DDR4 example designs and custom part data files
  ☆36Updated last year
• Essenceia / low-latency-ethernet
  RTL implementation of the low latency ethernet modules for the NASDAQ HFT FPGA project.
  ☆36Updated last year
• forconesi / nfmac10g
  Open source 10 Gigabit Ethernet MAC core compatible with Xilinx's non-free 10GMAC
  ☆62Updated 8 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆104Updated 3 years ago
• Goshik92 / SHA256Hasher
  SHA-256 IP core for ZedBoard (Zynq SoC)
  ☆31Updated 6 years ago
• fpgadeveloper / zcu102-ethernet
  Design for using Ethernet on the ZCU102 development board
  ☆12Updated 5 years ago
• huaweicloud / huaweicloud-fpga
  The official repository of the HUAWEI CLOUD FPGA Development Kit based on HUAWEI CLOUD FPGA Accelerated Cloud Server.
  ☆50Updated 6 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆43Updated 2 years ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 10 years ago
• hpb-project / BOE
  Blockchain Offload Engine
  ☆15Updated 6 years ago
• mcjtag / eth_switch
  Verilog Ethernet Switch (layer 2)
  ☆43Updated last year
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆22Updated 6 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆46Updated last year
• fpgasystems / davos
  Distributed Accelerator OS
  ☆63Updated 3 years ago
• freecores / ha1588
  Hardware Assisted IEEE 1588 IP Core
  ☆28Updated 10 years ago
• hpcn-uam / efficient_checksum-offload-engine
  Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…
  ☆17Updated 5 years ago
• lucasbrasilino / net2axis
  Verilog network module. Models network traffic from pcap to AXI-Stream
  ☆23Updated 4 years ago
• antmicro / nvme-verilog-pcie
  ☆58Updated 2 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆66Updated 5 months ago
• brown9804 / PCIe_physical_layer
  Implementation of the PCIe physical layer
  ☆37Updated 3 months ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆36Updated 8 years ago
• Xilinx / HLS_packet_processing
  ☆45Updated 5 years ago
• maswx / vu13p
  国产VU13P加速卡资料
  ☆70Updated last month
• socrocket / core
  SoCRocket - Core Repository
  ☆35Updated 8 years ago
• luinaudt / deparser
  ☆16Updated 3 years ago
• alexforencich / fpga-utils
  Various utilities for working with FPGAs
  ☆11Updated 9 years ago