eva-cam / EvaCAMLinks
☆12Updated 8 months ago
Alternatives and similar repositories for EvaCAM
Users that are interested in EvaCAM are comparing it to the libraries listed below
Sorting:
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆36Updated 3 years ago
- A collection of research papers on SRAM-based compute-in-memory architectures.☆29Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆83Updated 4 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆49Updated 9 months ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆92Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆74Updated 2 years ago
- ☆39Updated 8 months ago
- Benchmark framework of 3D integrated CIM accelerators for popular DNN inference, support both monolithic and heterogeneous 3D integration☆24Updated 4 years ago
- A reading list for SRAM-based Compute-In-Memory (CIM) research.☆104Updated last month
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆75Updated 9 months ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆73Updated last month
- ☆72Updated 2 years ago
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆35Updated this week
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆53Updated 4 years ago
- An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization☆23Updated last year
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆46Updated 4 months ago
- ☆20Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆24Updated 7 months ago
- A general framework for optimizing DNN dataflow on systolic array☆38Updated 4 years ago
- Neural Network Evaluation Tool on Crossbar-based Accelerator with Resistive Memory☆41Updated 6 years ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆64Updated 5 months ago
- [TVLSI 2025] ACiM Inference Simulation Framework in "ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits"☆25Updated 3 months ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆49Updated 3 months ago
- ☆18Updated last year
- ☆31Updated 8 months ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆60Updated 4 years ago
- ☆60Updated 8 months ago
- ☆35Updated 5 years ago