pulp-platform / sneLinks
☆18Updated 2 years ago
Alternatives and similar repositories for sne
Users that are interested in sne are comparing it to the libraries listed below
Sorting:
- ☆17Updated 4 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆26Updated 6 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆57Updated 3 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆85Updated 3 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆12Updated 2 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- Framework for radix encoded SNN on FPGA☆14Updated 3 years ago
- ☆25Updated 3 years ago
- ☆19Updated 4 years ago
- ☆47Updated last year
- ☆24Updated 2 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆60Updated 2 years ago
- Fully opensource spiking neural network accelerator☆152Updated 2 years ago
- Stochastic Computing for Deep Neural Networks☆33Updated 4 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆20Updated last year
- Spiking Neural Network RTL Implementation☆58Updated 4 years ago
- ☆33Updated 6 years ago
- Spiking Neural Network Accelerator☆15Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆52Updated 4 years ago
- From Pytorch model to C++ for Vitis HLS☆17Updated last week
- ☆36Updated last year
- Fully Hardware-Based Stochastic Neural Network☆22Updated 5 months ago
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆50Updated last year
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆17Updated 2 years ago
- SNN on FPGA☆10Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆33Updated 5 months ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆18Updated 5 years ago