pulp-platform / sneLinks
☆18Updated 2 years ago
Alternatives and similar repositories for sne
Users that are interested in sne are comparing it to the libraries listed below
Sorting:
- ☆17Updated 4 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- ☆19Updated 4 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆26Updated 5 years ago
- SNN on FPGA☆10Updated 3 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆57Updated 3 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆59Updated 2 years ago
- Framework for radix encoded SNN on FPGA☆13Updated 3 years ago
- Fully Hardware-Based Stochastic Neural Network☆22Updated 5 months ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆84Updated 3 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆11Updated 2 years ago
- Spiking neural network for Zynq devices with Vivado HLS☆34Updated 7 years ago
- ☆25Updated 3 years ago
- Spiking Neural Network Accelerator☆15Updated 3 years ago
- ☆47Updated last year
- Notebooks for Hardware-Aware Training of Spiking Neural Networks. Open-Source Neuromorphic Circuit Design Tutorial at ESSCIRC 2023.☆23Updated last year
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆16Updated 5 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆51Updated 4 years ago
- From Pytorch model to C++ for Vitis HLS☆17Updated this week
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆19Updated last year
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago
- LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks, MICRO 2024.☆11Updated 3 months ago
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆14Updated last year
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆58Updated 3 months ago
- Spiking Neural Network RTL Implementation☆57Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆42Updated 4 years ago
- ☆20Updated 3 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago