Alternatives and similar repositories for galapagos

Users that are interested in galapagos are comparing it to the libraries listed below

• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆26Updated 4 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• pulp-platform / obi
  OBI SystemVerilog synthesizable interconnect IPs for on-chip communication
  ☆14Updated this week
• icgrp / prflow_nested_dfx
  Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)
  ☆14Updated last year
• hyoukjun / microswitch-noc
  ☆27Updated 5 years ago
• kiabuzz / CompressedLUT
  A tool to generate optimized hardware files for univariate functions.
  ☆29Updated last year
• andrewboutros / rad-flow
  The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…
  ☆36Updated 2 weeks ago
• scale-lab / DRUM
  The Verilog source code for DRUM approximate multiplier.
  ☆31Updated 2 years ago
• zslwyuan / Zynq_HLS_DDR_Dataflow_kernel_2mm
  This is a project integrating HLS IP and CortexA9 on Zynq. This CPU-FPGA project, for a Matrix Multiplication Dataflow, is implemented wi…
  ☆21Updated 5 years ago
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆28Updated 8 months ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year
• kmanev / ZynqUSp-AXI-Speedtest
  ☆14Updated 5 years ago
• Kareem-Emad / DCNN-Accelerator
  Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.
  ☆12Updated 6 years ago
• vaughnbetz / COFFE
  ☆42Updated 8 months ago
• matutani / nocgen
  NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers
  ☆63Updated 5 years ago
• lana555 / dynamatic
  ☆86Updated last year
• esynr3z / axi_vip_demo
  Xilinx AXI VIP example of use
  ☆40Updated 4 years ago
• arcade-lab / tia-infrastructure
  ☆19Updated 7 years ago
• chipsalliance / aib-protocols
  ☆26Updated last year
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• opensmartnic / cocotb_primer
  understanding of cocotb （In Chinese Only）
  ☆17Updated last year
• jmjos / ratatoskr
  Ratatoskr NoC Simulator
  ☆26Updated 4 years ago
• MEEPproject / fpga_shell
  MEEP FPGA Shell project, currently supporting Alveos u280 and u55c
  ☆12Updated last year
• StanfordAHA / CGRAFlowDoc
  Documentation for the entire CGRAFlow
  ☆19Updated 3 years ago
• TUD-ADS / HiFlipVX
  ☆16Updated 2 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• AmeerAbdelhadi / Multiported-RAM
  Modular Multi-ported SRAM-based Memory
  ☆29Updated 6 months ago
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆75Updated 10 years ago
• hyoukjun / OpenSMART
  Public release
  ☆51Updated 5 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago