gatecat / hrtLinks
Hot Reconfiguration Technology demo
☆40Updated 2 years ago
Alternatives and similar repositories for hrt
Users that are interested in hrt are comparing it to the libraries listed below
Sorting:
- Industry standard I/O for Amaranth HDL☆28Updated 8 months ago
- User-friendly explanation of Yosys options☆113Updated 3 years ago
- Unofficial Yosys WebAssembly packages☆71Updated this week
- Documenting Lattice's 28nm FPGA parts☆143Updated last year
- ☆22Updated 3 years ago
- Experiments with Yosys cxxrtl backend☆49Updated 5 months ago
- An FPGA reverse engineering and documentation project☆47Updated last week
- 妖刀夢渡☆59Updated 6 years ago
- My pergola FPGA projects☆30Updated 3 years ago
- System on Chip toolkit for Amaranth HDL☆91Updated 8 months ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated 6 months ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- Another size-optimized RISC-V CPU for your consideration.☆58Updated 3 weeks ago
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆90Updated 7 months ago
- Use ECP5 JTAG port to interact with user design☆29Updated 3 years ago
- LiteX project for the ButterStick bootloader☆14Updated 2 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆43Updated 3 weeks ago
- Miscellaneous ULX3S examples (advanced)☆78Updated this week
- ☆67Updated 2 years ago
- Board definitions for Amaranth HDL☆117Updated 2 months ago
- Exploring gate level simulation☆58Updated last month
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Updated 2 years ago
- RFCs for changes to the Amaranth language and standard components☆18Updated last month
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆32Updated 3 years ago
- Project X-Ray Database: XC7 Series☆69Updated 3 years ago
- Finding the bacteria in rotting FPGA designs.☆14Updated 4 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆38Updated last year
- Example litex Risc-V SOC and some example code projects in multiple languages.☆67Updated 2 years ago
- an inverter drawn in magic with makefile to simulate☆26Updated 2 years ago
- Board and connector definition files for nMigen☆30Updated 4 years ago