Alternatives and similar repositories for hrt

Users that are interested in hrt are comparing it to the libraries listed below

• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆50Updated 9 months ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆30Updated last year
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆112Updated 4 years ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 6 months ago
• gatecat / prjoxide
  Documenting Lattice's 28nm FPGA parts
  ☆144Updated last year
• amaranth-lang / rtl-debugger
  VS Code based debugger for hardware designs in Amaranth or Verilog
  ☆39Updated 10 months ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆14Updated 4 years ago
• gregdavill / ecpprog
  Programmer for the Lattice ECP5 series, making use of FTDI based adaptors
  ☆90Updated 11 months ago
• kbeckmann / pergola_projects
  My pergola FPGA projects
  ☆30Updated 4 years ago
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆58Updated this week
• lachlansneff / ligeia
  A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.
  ☆19Updated 3 years ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆73Updated this week
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆57Updated 3 weeks ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 4 years ago
• clairexen / picorv
  PicoRV
  ☆43Updated 5 years ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆63Updated 6 years ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆95Updated last year
• apertus-open-source-cinema / naps
  An experiment for building gateware for the axiom micro / beta using amaranth-hdl
  ☆45Updated 4 months ago
• sylefeb / Iron
  Iron: selectively turn RISC-V binaries into hardware
  ☆23Updated 2 years ago
• awygle / waggle
  Rust proof-of-concept for GPU waveform rendering
  ☆13Updated 5 years ago
• Ravenslofty / blog
  The Critical Path - a rambly FPGA blog
  ☆50Updated 5 years ago
• butterstick-fpga / butterstick-bootloader
  LiteX project for the ButterStick bootloader
  ☆14Updated 2 years ago
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 3 years ago
• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆80Updated 3 months ago
• rob-ng15 / Silice-Playground
  Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
  ☆36Updated 2 years ago
• icebreaker-fpga / icebreaker-litex-examples
  Example litex Risc-V SOC and some example code projects in multiple languages.
  ☆70Updated 2 years ago
• jeanthom / gram
  DDR3 controller for nMigen (WIP)
  ☆14Updated last year
• amaranth-lang / rfcs
  RFCs for changes to the Amaranth language and standard components
  ☆18Updated this week
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated last year
• folknology / IceCore
  IceCore Ice40 HX based modular core
  ☆45Updated 4 years ago