Alternatives and similar repositories for buildroot

Users that are interested in buildroot are comparing it to the libraries listed below

• FPGAwars / FLIX-V
  FLIX-V: FPGA, Linux and RISC-V
  ☆42Updated 2 years ago
• smunaut / doom_riscv
  Doom classic port to lightweight RISC‑V
  ☆107Updated 3 years ago
• smunaut / iCE40linux
  Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker
  ☆103Updated 2 years ago
• ulixxe / usb_cdc
  Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
  ☆187Updated last year
• f4pga / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆58Updated 2 years ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 9 months ago
• olofk / corescore
  CoreScore
  ☆171Updated 2 months ago
• popovicu / linux-no-mmu-userspace-example
  ☆45Updated 2 years ago
• regymm / pcie_7x
  PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers
  ☆68Updated 9 months ago
• olofk / vidbo
  Virtual Development Board
  ☆64Updated 4 years ago
• regymm / quasiSoC
  Linux capable RISC-V SoC designed to be readable and useful.
  ☆158Updated last month
• bl0x / learn-fpga-amaranth
  Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL
  ☆112Updated last year
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆63Updated 4 years ago
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆63Updated 2 years ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆59Updated 2 years ago
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆73Updated last month
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆59Updated this week
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆35Updated 2 years ago
• fontamsoc / pu32
  ☆15Updated 8 months ago
• openXC7 / toolchain-installer
  Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7
  ☆92Updated 7 months ago
• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆110Updated this week
• openXC7 / openXC7-snap
  snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support
  ☆29Updated last year
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆94Updated 3 months ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆107Updated 4 years ago
• ulx3s / fpga-odysseus
  FPGA Odysseus with ULX3S
  ☆69Updated 2 years ago
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 4 years ago
• gsmecher / minimax
  Minimax: a Compressed-First, Microcoded RISC-V CPU
  ☆223Updated last year
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆177Updated 3 weeks ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆65Updated 8 months ago
• brouhaha / glacial
  Glacial - microcoded RISC-V core designed for low FPGA resource utilization
  ☆88Updated 6 years ago