barabanshek / DaggerLinks
HW/SW co-designed end-host RPC stack
☆20Updated 3 years ago
Alternatives and similar repositories for Dagger
Users that are interested in Dagger are comparing it to the libraries listed below
Sorting:
- RPCNIC: A High-Performance and Reconfigurable PCIe-attached RPC Accelerator [HPCA2025]☆11Updated 8 months ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆54Updated last year
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- ☆65Updated 4 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- Clio, ASPLOS'22.☆78Updated 3 years ago
- A Cycle-level simulator for M2NDP☆30Updated 2 weeks ago
- Quick & Flexible Rack-Scale Computer Architecture Simulator☆47Updated last week
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 4 years ago
- ☆27Updated 2 months ago
- A fast, accurate, and easy-to-integrate memory simulator that model memory system performance with bandwidth--latency curves.☆26Updated last month
- ☆19Updated 4 years ago
- ☆14Updated 2 years ago
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- A Full-System Simulator for CXL-Based SSD Memory System☆30Updated 8 months ago
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆18Updated 3 years ago
- STONNE Simulator integrated into SST Simulator☆20Updated last year
- (elastic) cuckoo hashing☆14Updated 5 years ago
- FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]☆131Updated 2 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- Pin based tool for simulation of rack-scale disaggregated memory systems☆26Updated 5 months ago
- ☆20Updated 2 years ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆42Updated 8 years ago
- ☆25Updated last year
- A Programmable Hardware Architecture for Network Transport Logic☆35Updated 3 years ago
- ☆35Updated 4 years ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆37Updated 5 months ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆22Updated 7 years ago
- PIM-ML is a benchmark for training machine learning algorithms on the UPMEM architecture, which is the first publicly-available real-worl…☆24Updated 7 months ago
- ☆11Updated 3 years ago