abdelfattah-lab / Kratos-benchmarkLinks
Kratos: An FPGA Benchmark for Unrolled Deep Neural Networks with Fine-Grained Sparsity and Mixed Precision
☆12Updated this week
Alternatives and similar repositories for Kratos-benchmark
Users that are interested in Kratos-benchmark are comparing it to the libraries listed below
Sorting:
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆74Updated 2 months ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆92Updated last year
- [TRETS 2025][FPGA 2024] FPGA Accelerator for Imbalanced SpMV using HLS☆19Updated 4 months ago
- Open-source of MSD framework☆16Updated 2 years ago
- An FPGA Accelerator for Transformer Inference☆92Updated 3 years ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆175Updated 2 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆43Updated 2 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆162Updated this week
- A collection of tutorials for the fpgaConvNet framework.☆47Updated last year
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆64Updated 6 months ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆95Updated 4 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆83Updated 4 years ago
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆35Updated this week
- ☆124Updated 5 years ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆55Updated 2 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆76Updated 10 months ago
- ☆37Updated 2 months ago
- RTL implementation of Flex-DPE.☆115Updated 5 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- A list of our chiplet simulaters☆46Updated 6 months ago
- ☆42Updated last year
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆23Updated last year
- Library of approximate arithmetic circuits☆61Updated 3 years ago
- FPGA based Vision Transformer accelerator (Harvard CS205)☆142Updated 10 months ago
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆42Updated 4 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆50Updated 10 months ago
- Exercises for exploring the Fibertree, Timeloop and Accelergy tools☆111Updated 9 months ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33Updated 6 years ago
- ☆19Updated 7 months ago