cliffordwolf / PonyLinkLinks
A single-wire bi-directional chip-to-chip interface for FPGAs
☆125Updated 9 years ago
Alternatives and similar repositories for PonyLink
Users that are interested in PonyLink are comparing it to the libraries listed below
Sorting:
- A utility for Composing FPGA designs from Peripherals☆186Updated last year
- An Open Source configuration of the Arty platform☆131Updated last year
- ☆63Updated 7 years ago
- Featherweight RISC-V implementation☆53Updated 3 years ago
- SoftCPU/SoC engine-V☆55Updated 9 months ago
- Project X-Ray Database: XC7 Series☆73Updated 4 years ago
- A wishbone controlled scope for FPGA's☆85Updated 2 years ago
- VHDL library 4 FPGAs☆184Updated this week
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- Verilog wishbone components☆123Updated 2 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆71Updated 3 years ago
- PicoRV☆43Updated 5 years ago
- FuseSoC standard core library☆151Updated last month
- USB Serial on the TinyFPGA BX☆139Updated 4 years ago
- Ultimate ECP5 development board☆115Updated 6 years ago
- The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.☆70Updated 7 years ago
- ☆138Updated last year
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆47Updated last year
- A Video display simulator☆174Updated 7 months ago
- Nitro USB FPGA core☆86Updated last year
- CoreScore☆171Updated 2 months ago
- LatticeMico32 soft processor☆107Updated 11 years ago
- Naive Educational RISC V processor☆94Updated 3 months ago
- Yet Another RISC-V Implementation☆99Updated last year
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆69Updated 3 weeks ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.☆81Updated 3 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆82Updated 5 years ago