Alternatives and similar repositories for PonyLink

Users that are interested in PonyLink are comparing it to the libraries listed below

• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆82Updated last year
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆181Updated 6 months ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆63Updated 6 years ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆70Updated 3 years ago
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆115Updated last year
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 3 years ago
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆130Updated last year
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆65Updated last week
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆144Updated last month
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆179Updated this week
• davidthings / tinyfpga_bx_usbserial
  USB Serial on the TinyFPGA BX
  ☆137Updated 4 years ago
• f4pga / prjuray
  Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
  ☆79Updated 3 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆89Updated 6 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 3 months ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• ldoolitt / vhd2vl
  ☆134Updated 7 months ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 3 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆90Updated 5 years ago
• gatecat / TrellisBoard
  Ultimate ECP5 development board
  ☆111Updated 6 years ago
• ZipCPU / vgasim
  A Video display simulator
  ☆171Updated last month
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆89Updated 6 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆106Updated 10 years ago
• im-tomu / valentyusb
  FPGA USB stack written in LiteX
  ☆127Updated 3 years ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆84Updated last month
• nullobject / sdram-fpga
  A FPGA core for a simple SDRAM controller.
  ☆119Updated 3 years ago
• mcmayer / iCE40
  Lattice iCE40 FPGA experiments - Work in progress
  ☆105Updated 4 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆62Updated 2 years ago
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆96Updated 3 years ago
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆34Updated 6 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆86Updated last year