Alternatives and similar repositories for PonyLink

Users that are interested in PonyLink are comparing it to the libraries listed below

• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆84Updated last year
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆118Updated last year
• hdl4fpga / hdl4fpga
  VHDL library 4 FPGAs
  ☆181Updated last week
• ZipCPU / openarty
  An Open Source configuration of the Arty platform
  ☆132Updated last year
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆70Updated 3 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆147Updated 4 months ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆67Updated 3 weeks ago
• maikmerten / spu32
  Small Processing Unit 32: A compact RV32I CPU written in Verilog
  ☆69Updated 3 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆53Updated 3 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆107Updated 10 years ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆88Updated 2 months ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆184Updated 9 months ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 4 years ago
• davidthings / tinyfpga_bx_usbserial
  USB Serial on the TinyFPGA BX
  ☆139Updated 4 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆95Updated 5 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆91Updated 7 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 6 months ago
• cambridgehackers / fpgamake
  Generates Makefiles to synthesize, place, and route verilog using Vivado
  ☆97Updated 3 years ago
• gatecat / TrellisBoard
  Ultimate ECP5 development board
  ☆113Updated 6 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆65Updated 7 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆91Updated 6 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆87Updated last year
• f4pga / prjuray
  Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
  ☆81Updated 3 years ago
• tommythorn / yarvi
  Yet Another RISC-V Implementation
  ☆97Updated last year
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆64Updated 6 years ago
• im-tomu / valentyusb
  FPGA USB stack written in LiteX
  ☆129Updated 3 years ago
• SpinalHDL / SaxonSoc
  SoC based on VexRiscv and ICE40 UP5K
  ☆160Updated 6 months ago