laurivosandi / hdl

Related projects: ⓘ

• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆42Updated 9 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆52Updated last year
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆32Updated 6 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆35Updated 5 years ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆39Updated 6 years ago
• hellgate202 / csi2_rx
  MIPI CSI-2 RX
  ☆28Updated 2 years ago
• Elphel / eddr3
  mirror of https://git.elphel.com/Elphel/eddr3
  ☆40Updated 6 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆39Updated 3 months ago
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆33Updated 7 years ago
• h-nasiri / Zynq-Linux-DMA
  DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.
  ☆36Updated 7 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆28Updated 5 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• fpgadeveloper / zedboard-axi-dma
  Demonstration of the AXI DMA engine on the ZedBoard
  ☆50Updated 3 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆19Updated 6 years ago
• ericgineer / CIC
  A CIC filter implemented in Verilog
  ☆20Updated 9 years ago
• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆30Updated 9 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 3 years ago
• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 7 years ago
• pulp-platform / axi_spi_slave
  ☆21Updated 3 years ago
• patocarr / axi-traffic-gen
  File editor for the Xilinx AXI Traffic Generator IP
  ☆14Updated last year
• fpgadeveloper / ethernet-fmc-zynq-gem
  Example design for the Ethernet FMC using the hard GEMs of the Zynq
  ☆52Updated 7 months ago
• Elphel / x393_sata
  mirror of https://git.elphel.com/Elphel/x393_sata
  ☆33Updated 4 years ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆21Updated 9 months ago
• CospanDesign / vivado-ip-cores
  IP Cores that can be used within Vivado
  ☆24Updated 3 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆75Updated 4 years ago
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆65Updated 2 years ago
• louisliuwei / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆34Updated 4 years ago
• ThalesGroup / TMR
  Triple Modular Redundancy
  ☆23Updated 5 years ago
• circuitvalley / USB3_MIPI_CSI2_RX_V2_Crosslink_NX
  MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…
  ☆45Updated 4 years ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆33Updated 3 years ago