dan-rodrigues / ics-adpcmLinks
Programmable multichannel ADPCM decoder for FPGA
☆25Updated 4 years ago
Alternatives and similar repositories for ics-adpcm
Users that are interested in ics-adpcm are comparing it to the libraries listed below
Sorting:
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- Quickly update a bitstream with new RAM contents☆15Updated 4 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Updated 7 years ago
- Example Verilog code for Ulx3s☆42Updated 3 years ago
- Simplified environment for litex☆14Updated 5 years ago
- Bit streams forthe Ulx3s ECP5 device☆18Updated 2 years ago
- PMOD boards for ULX3S☆46Updated 2 years ago
- Retro computing on the Ulx3s ECP5 FPGA board☆25Updated 3 years ago
- DVI video out example for prjtrellis☆17Updated 6 years ago
- VGA-compatible text mode functionality☆17Updated 5 years ago
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆20Updated last year
- ice40 UltraPlus demos☆16Updated 6 years ago
- DSP Blocks for the nMigen (Python) Toolbox☆11Updated 5 years ago
- Utilities for the ECP5 FPGA☆17Updated 4 years ago
- IceCore Ice40 HX based modular core☆45Updated 4 years ago
- Use ECP5 JTAG port to interact with user design☆32Updated 4 years ago
- Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs☆32Updated 4 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 5 years ago
- HDMI Expansion Modules compatible with the Pmod standard☆11Updated 7 years ago
- Miscellaneous ULX3S examples (advanced)☆81Updated 5 months ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Updated 3 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆31Updated 5 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆25Updated 5 years ago
- PLEASE MOVE TO PAWSv2☆16Updated 3 years ago
- nMigen examples for the ULX3S board☆16Updated 5 years ago
- Simple BLE demo using an iOS app (SwiftUI), an ESP32 (Python) and an FPGA (Verilog)☆15Updated 4 years ago
- The binaries for SaxonSoc Linux and other configurations☆17Updated 2 years ago
- ☆16Updated 3 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Updated 5 years ago
- Test of a RP2040 PMOD attached to a LiteX SoC.☆27Updated 2 years ago