aws-samples / generative-ai-for-semiconductor-designLinks
Generative AI for Semiconductor Design: Engineering Assistant built with Bedrock, Knowledge Bases and Langchain
☆28Updated last year
Alternatives and similar repositories for generative-ai-for-semiconductor-design
Users that are interested in generative-ai-for-semiconductor-design are comparing it to the libraries listed below
Sorting:
- ☆95Updated 6 years ago
- ☆38Updated 2 years ago
- Logic synthesis and ABC based optimization☆51Updated last week
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆200Updated 5 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆189Updated 8 months ago
- ☆33Updated last week
- This is a tutorial on standard digital design flow☆83Updated 4 years ago
- OpenROAD's Chatbot Assistant☆28Updated this week
- ☆99Updated 10 months ago
- ☆49Updated last year
- EE 260 Winter 2017: Advanced VLSI Design☆68Updated 9 years ago
- SMT-based-STDCELL-Layout-Generator☆18Updated 4 years ago
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆129Updated 2 years ago
- Open source process design kit for 28nm open process☆71Updated last year
- ☆229Updated 10 months ago
- ☆15Updated 3 months ago
- A set of Python based parsers for multiple file format used in IC chip design, including Verilog, SPICE, lib (Synopsys Liberty).☆32Updated 10 years ago
- Physical Design Flow from RTL to GDS using Opensource tools.☆117Updated 5 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year
- Database and Tool Framework for EDA☆122Updated 4 years ago
- ☆16Updated 4 years ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆77Updated 3 years ago
- Project repo for the POSH on-chip network generator☆52Updated 10 months ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Updated 4 years ago
- LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust☆36Updated last year
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- ☆186Updated 4 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆78Updated 5 years ago
- SRAM☆22Updated 5 years ago
- ☆109Updated 6 years ago