andre1araujo / YOLO-on-PYNQ-Z2Links
This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step-by-step tutorial associated so everyone can do it.
☆58Updated 2 months ago
Alternatives and similar repositories for YOLO-on-PYNQ-Z2
Users that are interested in YOLO-on-PYNQ-Z2 are comparing it to the libraries listed below
Sorting:
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆107Updated last year
- a Real-time image recognition project with RTL accelerator and ZYNQ Architecture☆60Updated last year
- ☆52Updated 2 years ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆28Updated 3 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆45Updated 4 years ago
- Implement Tiny YOLO v3 on ZYNQ☆291Updated last month
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆79Updated 4 years ago
- FPGA实现动态图像识别☆21Updated 4 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆152Updated 2 years ago
- hls code zynq 7020 pynq z2 CNN☆85Updated 6 years ago
- 【入门项目】这个仓库是用hls来实现手写数字识别CNN硬件(xilinx fpga)加速的代码☆76Updated 2 years ago
- some interesting demos for starters☆81Updated 2 years ago
- An AIoT project based on PYNQ-Z2 FPGA Evaluation board. Reading image from usb camera and running yolov3-tiny detection with DPU and usin…☆12Updated 3 years ago
- ☆233Updated last year
- General CNN_Accelerator design.卷积神经网络加速器设计。在PYNQ-Z2 FPGA开发板上实现了卷积池化全连接层等硬件加速计算。☆48Updated 3 months ago
- Nuclei E203 with yolo accelerator based on xc7k325☆14Updated 10 months ago
- 可运行☆34Updated 2 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆95Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆180Updated last year
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆148Updated 4 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆178Updated 7 months ago
- 搭建卷积神经网络并利用FPGA加速实现交通标志识别☆27Updated 4 years ago
- An LeNet RTL implement onto FPGA☆48Updated 7 years ago
- yolov5-acceleration-fpga☆10Updated 2 weeks ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆22Updated 4 years ago
- FPGA☆155Updated 11 months ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- CNN accelerator implemented with Spinal HDL☆149Updated last year
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆37Updated 4 years ago