rulai-hu / DNNDK-YOLOv3

Related projects ⓘ

Alternatives and complementary repositories for DNNDK-YOLOv3

• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• hirayaku / DAC2018-TGIIF
  The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track
  ☆88Updated 5 years ago
• JunningWu / Learning-NVDLA-Notes
  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…
  ☆221Updated 5 years ago
• TomG008 / SkyNet
  ☆235Updated 2 years ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆119Updated 5 years ago
• Xilinx / AI-Model-Zoo
  ☆75Updated 2 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆66Updated 6 years ago
• xyzxinyizhang / 2019-DAC-System-Design-Contest
  ☆35Updated 5 years ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆96Updated 6 years ago
• Xilinx / QNN-MO-PYNQ
  ☆242Updated 4 years ago
• wutianze / dnndk-pynqz2
  First lesson for you to use DNNDK, also it can be helpful for your AI learning
  ☆65Updated last year
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆110Updated 3 years ago
• jiangwx / SkrSkr
  The second place winner for DAC-SDC 2020
  ☆96Updated 2 years ago
• TF2-Engine / TF2
  An Open Source Deep Learning Inference Engine Based on FPGA
  ☆159Updated 3 years ago
• embedeep / Free-TPU
  Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…
  ☆238Updated last year
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆202Updated 9 months ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆77Updated 5 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆106Updated 7 years ago
• nachiket / papaa-opencl
  OpenCL Labs for PAPAA Summer School 2016 Edition
  ☆46Updated 7 years ago
• xyzxinyizhang / 2018-DAC-System-Design-Contest
  ☆53Updated 5 years ago
• FerberZhang / Yolov2-FPGA-CNN-
  ☆15Updated 4 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• CSL-KU / firesim-nvdla
  FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud
  ☆161Updated 2 years ago
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆323Updated 5 years ago
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆306Updated 10 months ago
• xjtuiair-cag / XJTU-Tripler
  XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.
  ☆175Updated 10 months ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated last year
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆47Updated 4 years ago