ZipCPU / wbi2c
Wishbone controlled I2C controllers
☆45Updated 2 months ago
Alternatives and similar repositories for wbi2c:
Users that are interested in wbi2c are comparing it to the libraries listed below
- USB Full Speed PHY☆39Updated 4 years ago
- Wishbone interconnect utilities☆38Updated 7 months ago
- A set of Wishbone Controlled SPI Flash Controllers☆76Updated 2 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆86Updated 4 years ago
- Verilog wishbone components☆113Updated last year
- A wishbone controlled scope for FPGA's☆74Updated last year
- Fusesoc compatible rtl cores☆15Updated 2 years ago
- Verilog Repository for GIT☆31Updated 3 years ago
- Extensible FPGA control platform☆55Updated last year
- Minimal DVI / HDMI Framebuffer☆78Updated 4 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆37Updated last year
- Small (Q)SPI flash memory programmer in Verilog☆57Updated 2 years ago
- Using VexRiscv without installing Scala☆37Updated 3 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆30Updated 3 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆24Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆83Updated 6 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆79Updated 4 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated 2 weeks ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- Reusable Verilog 2005 components for FPGA designs☆39Updated last year
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆72Updated 9 months ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆40Updated 4 years ago
- Universal Advanced JTAG Debug Interface☆17Updated 8 months ago
- Another tiny RISC-V implementation☆54Updated 3 years ago
- Small footprint and configurable JESD204B core☆40Updated last week
- Tools for FPGA development.☆44Updated last year
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆40Updated 9 months ago
- SDRAM controller with multiple wishbone slave ports☆28Updated 6 years ago
- Test of the USB3 IP Core from Daisho on a Xilinx device☆86Updated 5 years ago
- Portable HyperRAM controller☆51Updated last month