trondd/oc-i2c external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

trondd/oc-i2c

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/trondd/oc-i2c)

Close

trondd / oc-i2cView on GitHubMore

• External links
• Readme badge

I2C controller core from Opencores.org

☆27Oct 5, 2011Updated 14 years ago

Alternatives and similar repositories for oc-i2c

Users that are interested in oc-i2c are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.

• caicaicai-ji / QSPI_FOR_SOC

  View on GitHub
  QSPI for SoC
  ☆23Nov 8, 2019Updated 6 years ago
• txzing / modbus_crc_verilog

  View on GitHub
  FPGA纯逻辑实现modbus通信
  ☆23Sep 5, 2022Updated 3 years ago
• ZipCPU / wbi2c

  View on GitHub
  Wishbone controlled I2C controllers
  ☆57Nov 12, 2024Updated last year
• vfinotti / ahb3lite_wb_bridge

  View on GitHub
  AHB3-Lite to Wishbone Bridge
  ☆13Mar 26, 2019Updated 6 years ago
• olofk / i2c

  View on GitHub
  I2C controller core
  ☆16Jun 1, 2022Updated 3 years ago
• skristiansson / wb_sdram_ctrl

  View on GitHub
  SDRAM controller with multiple wishbone slave ports
  ☆30Oct 26, 2018Updated 7 years ago
• ZipCPU / wbpwmaudio

  View on GitHub
  A wishbone controlled PWM (audio) controller
  ☆18Jan 16, 2024Updated 2 years ago
• paulscherrerinstitute / xvcSupport

  View on GitHub
  ☆18Oct 5, 2020Updated 5 years ago
• myriadrf / xtrx_linux_pcie_drv

  View on GitHub
  XTRX PCI driver for linux
  ☆18Mar 19, 2025Updated last year
• RoaLogic / vga_lcd

  View on GitHub
  VGA LCD Core (OpenCores)
  ☆14May 22, 2018Updated 7 years ago
• marsohod4you / Amber-Marsohod2

  View on GitHub
  Port of Amber ARM Core project to Marsohod2 platform
  ☆13Dec 4, 2019Updated 6 years ago
• pulp-platform / axi_spi_master

  View on GitHub
  ☆23Oct 8, 2019Updated 6 years ago
• nctu-ms07 / Computer-Organization

  View on GitHub
  108下 計算機組織 Computer Organization 李毅郎
  ☆11Feb 22, 2021Updated 5 years ago
• Corey-Maler / simple_SoC

  View on GitHub
  Small and simple, primitive SoC with GPU, CPU, RAM, GPIO
  ☆14Dec 29, 2016Updated 9 years ago
• www-asics-ws / wb_conmax

  View on GitHub
  WISHBONE Interconnect
  ☆11Oct 1, 2017Updated 8 years ago
• tgtakaoka / homebrew-mspgcc

  View on GitHub
  GCC toolchain for MSP430
  ☆10Apr 2, 2019Updated 6 years ago
• xfguo / spi

  View on GitHub
  SPI Master Core clone from OpenCores
  ☆12Oct 4, 2013Updated 12 years ago
• Shashi18 / I2C-Verilog

  View on GitHub
  Verilog Code for I2C Protocol
  ☆19Nov 12, 2020Updated 5 years ago
• emmanouil-komninos / jtag_vip_uvm

  View on GitHub
  ☆12Nov 11, 2015Updated 10 years ago
• freecores / wdsp

  View on GitHub
  DSP WishBone Compatible Cores
  ☆14Jul 17, 2014Updated 11 years ago
• gyurco / apple2efpga

  View on GitHub
  FPGA implementation of an Apple//e (enhanced)
  ☆16Mar 14, 2025Updated last year
• SeniorProject-2016 / Chip-Design

  View on GitHub
  Design and Verification of a Complete Application Specific Integrated Circuit
  ☆12Nov 21, 2016Updated 9 years ago
• freecores / nova

  View on GitHub
  H.264/AVC Baseline Decoder
  ☆16Jul 17, 2014Updated 11 years ago
• shalan / QSPI_XIP_CTRL_DMC

  View on GitHub
  Quad SPI Flash XIP Controller with a direct mapped cache
  ☆12Dec 9, 2020Updated 5 years ago
• ypctw / ICDC-undergrad

  View on GitHub
  Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽
  ☆23Apr 20, 2022Updated 3 years ago
• tinyvision-ai-inc / tinyVision_sensai

  View on GitHub
  Making Lattice SensAI work properly on tinyVision products
  ☆12Nov 22, 2022Updated 3 years ago
• alexforencich / verilog-i2c

  View on GitHub
  Verilog I2C interface for FPGA implementation
  ☆688Feb 27, 2025Updated last year
• dlitz / openmsp430

  View on GitHub
  openMSP430 CPU core (from OpenCores)
  ☆22Oct 14, 2022Updated 3 years ago
• charkster / spi_slave_verilog

  View on GitHub
  SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs
  ☆20Dec 15, 2019Updated 6 years ago
• ZipCPU / dbgbus

  View on GitHub
  A collection of debugging busses developed and presented at zipcpu.com
  ☆43Jan 18, 2024Updated 2 years ago
• MParygin / v.vga.font8x16

  View on GitHub
  Verilog VGA font generator 8 by 16 pixels
  ☆16Mar 30, 2022Updated 3 years ago
• necst / zynq_userspace_dma

  View on GitHub
  Userspace DMA library for Zynq-based SoCs
  ☆16Jan 22, 2019Updated 7 years ago
• visky2096 / AHB-to-I2C

  View on GitHub
  Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…
  ☆22Feb 25, 2019Updated 7 years ago
• kwonalbert / oram

  View on GitHub
  Recursive unified ORAM
  ☆15Sep 23, 2015Updated 10 years ago
• fhdm-dev / scoppy-experiments

  View on GitHub
  Experiments, tutorials and examples using the Scoppy oscilloscope and logic analyzer
  ☆20Mar 7, 2024Updated 2 years ago
• kole-huang / picorv32_soc

  View on GitHub
  picorv32_soc, simulation env, FPGA, boot code, RTOS
  ☆16Nov 6, 2018Updated 7 years ago
• srohit0 / CORDIC

  View on GitHub
  CORDIC VLSI-IP for deep learning activation functions
  ☆15Jul 13, 2019Updated 6 years ago
• wlf1998 / CA

  View on GitHub
  计算机体系结构课程
  ☆20May 17, 2019Updated 6 years ago
• alexforencich / verilog-lfsr

  View on GitHub
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆160Feb 27, 2025Updated last year