I2C controller core from Opencores.org
☆27Oct 5, 2011Updated 14 years ago
Alternatives and similar repositories for oc-i2c
Users that are interested in oc-i2c are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- QSPI for SoC☆23Nov 8, 2019Updated 6 years ago
- FPGA纯逻辑实现modbus通信☆24Sep 5, 2022Updated 3 years ago
- Wishbone controlled I2C controllers☆57Nov 12, 2024Updated last year
- AHB3-Lite to Wishbone Bridge☆13Mar 26, 2019Updated 7 years ago
- SDRAM controller with multiple wishbone slave ports☆30Oct 26, 2018Updated 7 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- I2C controller core☆16Jun 1, 2022Updated 3 years ago
- UART 16550 core☆40Jul 17, 2014Updated 11 years ago
- Verilog SPI master and slave☆63Jan 4, 2016Updated 10 years ago
- Multi-threaded 32-bit embedded core family.☆24Jul 9, 2012Updated 13 years ago
- A wishbone controlled PWM (audio) controller☆18Jan 16, 2024Updated 2 years ago
- ☆18Oct 5, 2020Updated 5 years ago
- VGA LCD Core (OpenCores)☆15May 22, 2018Updated 8 years ago
- Port of Amber ARM Core project to Marsohod2 platform☆13Dec 4, 2019Updated 6 years ago
- a fast multiplier implement using verilog☆13Dec 23, 2014Updated 11 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- SPI core☆14Oct 25, 2019Updated 6 years ago
- ☆24Oct 8, 2019Updated 6 years ago
- Using VexRiscv without installing Scala☆39Nov 10, 2021Updated 4 years ago
- Small and simple, primitive SoC with GPU, CPU, RAM, GPIO☆14Dec 29, 2016Updated 9 years ago
- GCC toolchain for MSP430☆10Apr 2, 2019Updated 7 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 8 years ago
- The ft232r_prog program provides a Linux command-line interface for reconfiguring the FT232R chip. By Marc Lord, http://rtr.ca/ft232r/☆16Sep 23, 2021Updated 4 years ago
- RISC-V instruction set CPUs in HardCaml☆15Sep 20, 2016Updated 9 years ago
- Verilog Code for I2C Protocol☆19Nov 12, 2020Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- DSP WishBone Compatible Cores☆14Jul 17, 2014Updated 11 years ago
- FPGA implementation of an Apple//e (enhanced)☆16Mar 14, 2025Updated last year
- H.264/AVC Baseline Decoder☆16Jul 17, 2014Updated 11 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Dec 9, 2020Updated 5 years ago
- AHB to APB Bridge VIP☆30Mar 4, 2019Updated 7 years ago
- ☆14Nov 11, 2015Updated 10 years ago
- Making Lattice SensAI work properly on tinyVision products☆12Nov 22, 2022Updated 3 years ago
- Verilog I2C interface for FPGA implementation☆702Feb 27, 2025Updated last year
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Super scalar Processor design☆21Sep 7, 2014Updated 11 years ago
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆21Dec 15, 2019Updated 6 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆43Jan 18, 2024Updated 2 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Feb 25, 2019Updated 7 years ago
- Userspace DMA library for Zynq-based SoCs☆16Jan 22, 2019Updated 7 years ago
- Recursive unified ORAM☆16Sep 23, 2015Updated 10 years ago
- The Ultra-Low Power RISC Core☆15May 5, 2020Updated 6 years ago