A collection of SPI related cores
☆23Nov 12, 2024Updated last year
Alternatives and similar repositories for wbspi
Users that are interested in wbspi are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Wishbone SATA Controller☆28Sep 17, 2026Updated 3 weeks ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Nov 21, 2017Updated 8 years ago
- ☆17Jan 12, 2021Updated 5 years ago
- git clone of http://code.google.com/p/axi-bfm/☆18May 21, 2013Updated 13 years ago
- Embedded UVM (D Language port of IEEE UVM 1.0)☆34Nov 6, 2025Updated 11 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆14Jun 21, 2026Updated 3 months ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆29Jun 12, 2019Updated 7 years ago
- WISHBONE Builder☆15Sep 10, 2016Updated 10 years ago
- Wishbone controlled I2C controllers☆63Aug 10, 2026Updated last month
- port of Stephen A. Edwards apple2fpga to ULX3S☆19Mar 27, 2024Updated 2 years ago
- This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board…☆16Aug 24, 2023Updated 3 years ago
- Y80e - Z80/Z180 compatible processor extended by eZ80 instructions☆23Jul 17, 2014Updated 12 years ago
- ☆27May 3, 2020Updated 6 years ago
- verilator testbench w/ Javascript using N-API☆18Feb 19, 2026Updated 7 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆89Dec 7, 2020Updated 5 years ago
- ☆18Nov 4, 2024Updated last year
- VexRiscV system with GDB-Server in Hardware☆21Jul 5, 2023Updated 3 years ago
- A wishbone controlled PWM (audio) controller☆19Jan 16, 2024Updated 2 years ago
- A mirror of the upstream binutils-gdb repository for ARC specific work☆16Updated this week
- ☆16May 3, 2025Updated last year
- Parsing library for BLIF netlists☆19Nov 1, 2024Updated last year
- A System on a Chip Implementation for the XuLA2-LX25 board☆17Dec 13, 2018Updated 7 years ago
- Facilitates building open source tools for working with hardware description languages (HDLs)☆69Dec 4, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- The Linux Foundation/Redwood EDA "Building a RISC-V CPU" Course content, also available via EdX.☆25Jul 9, 2024Updated 2 years ago
- Retro computing on the Ulx3s ECP5 FPGA board☆26Mar 3, 2022Updated 4 years ago
- Minimal ZX Spectrum for Ulx3s ECP5 board☆12May 7, 2020Updated 6 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆16Jan 22, 2025Updated last year
- Using VexRiscv without installing Scala☆40Nov 10, 2021Updated 4 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated last year
- Mega/Xmega soft core RTL design.☆11Feb 21, 2020Updated 6 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- LiteX-based gateware for LimeSDR boards.☆22Oct 2, 2026Updated last week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆19Sep 3, 2018Updated 8 years ago
- A 4x4x4 Tic-Tac-Toe game suitable for porting to embedded hardware platforms☆11Sep 6, 2017Updated 9 years ago
- This is a SpyDrNet Plugin for a physical design related transformations☆16Sep 22, 2026Updated 2 weeks ago
- A linux'ish build system for System on Chip designs, based on GHDL☆14Dec 14, 2024Updated last year
- A collection of debugging busses developed and presented at zipcpu.com☆45Jan 18, 2024Updated 2 years ago
- FPGA tutorial☆22Oct 3, 2020Updated 6 years ago
- A simple 6502 system built on a Lattice Ultra Plus 5k FPGA☆15Mar 11, 2019Updated 7 years ago