Alternatives and similar repositories for simple_spi

Users that are interested in simple_spi are comparing it to the libraries listed below

• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆60Updated last month
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 6 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆66Updated last month
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆46Updated 5 years ago
• olofk / i2c
  I2C controller core
  ☆16Updated 3 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 5 months ago
• olofk / observer
  ☆41Updated 5 years ago
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• DaveBerkeley / serv_soc
  SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.
  ☆32Updated 4 years ago
• YosysHQ / VlogHammer
  A Verilog Synthesis Regression Test
  ☆37Updated last year
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated 2 years ago
• cliffordwolf / icotools
  Tools and Examples for IcoBoard
  ☆80Updated 4 years ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated 2 years ago
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆124Updated 9 years ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆21Updated 4 years ago
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆70Updated 3 years ago
• cloudxcc / Arduissimo
  Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).
  ☆21Updated 5 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated last year
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• SpinalHDL / VexRiscvSoftcoreContest2018
  ☆64Updated 6 years ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆51Updated 2 years ago
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆90Updated 6 years ago
• ArcaneNibble / KinglerPAR
  Next-Generation FPGA Place-and-Route
  ☆10Updated 7 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆34Updated 7 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆53Updated 3 years ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆36Updated 4 years ago
• ZipCPU / s6soc
  CMod-S6 SoC
  ☆42Updated 7 years ago