falconcomputing / merlin-compilerLinks
Falcon Merlin Compiler
☆41Updated 5 years ago
Alternatives and similar repositories for merlin-compiler
Users that are interested in merlin-compiler are comparing it to the libraries listed below
Sorting:
- ☆58Updated last year
- ☆86Updated last year
- ☆29Updated 6 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Updated 7 years ago
- A DSL for Systolic Arrays☆80Updated 6 years ago
- Next generation CGRA generator☆112Updated last week
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆166Updated last year
- A high-level performance analysis tool for FPGA-based accelerators☆20Updated 8 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- ☆59Updated last week
- Benchmarks for Accelerator Design and Customized Architectures☆129Updated 5 years ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆60Updated 3 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆122Updated 2 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆126Updated 2 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 3 years ago
- ☆19Updated 7 years ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Updated 4 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 4 months ago
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆154Updated 2 years ago
- Train and deploy LUT-based neural networks on FPGAs☆97Updated last year
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆75Updated 6 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 3 years ago
- ☆58Updated 5 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆69Updated last year
- PyTorch model to RTL flow for low latency inference☆128Updated last year
- PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow☆67Updated 2 years ago
- ☆15Updated 2 years ago
- ☆31Updated last month