Exploring Shared Virtual Memory Abstractions in OpenCL Tools for FPGAs
☆18Dec 7, 2017Updated 8 years ago
Alternatives and similar repositories for FPGA-shared-mem
Users that are interested in FPGA-shared-mem are comparing it to the libraries listed below
Sorting:
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 9 years ago
- ☆21Dec 9, 2018Updated 7 years ago
- Hardware Snappy decompressor☆11Sep 11, 2024Updated last year
- High-througput logic analyzer for FPGA☆16Oct 8, 2020Updated 5 years ago
- SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).☆12Oct 14, 2017Updated 8 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 7 years ago
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 5 years ago
- The official repository of the local FPGA Development Kit.☆19Apr 30, 2019Updated 6 years ago
- high level VHDL floating point library for synthesis in fpga☆18Dec 18, 2025Updated 3 months ago
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated last year
- An FPGA-based NetTLP adapter☆27Mar 10, 2020Updated 6 years ago
- ☆16Aug 21, 2019Updated 6 years ago
- This is a myhdl test environment for the open-cores jpeg_encoder.☆18Oct 23, 2016Updated 9 years ago
- A OpenCL-based FPGA benchmark suite for HPC☆37Jan 29, 2026Updated last month
- This library provides access to nRF-52 and nRF-53 peripherals in Rust.☆11Sep 7, 2023Updated 2 years ago
- ☆36Jan 21, 2021Updated 5 years ago
- Unifies OS page cache for heterogeneous systems☆12Jul 26, 2019Updated 6 years ago
- Collaborative Execution Strategies for Heterogeneous CPU-FPGA Architectures☆11Apr 23, 2019Updated 6 years ago
- ILA Model Database☆24Sep 27, 2020Updated 5 years ago
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆24Oct 29, 2025Updated 4 months ago
- ☆13Jun 20, 2023Updated 2 years ago
- VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe☆18Oct 23, 2019Updated 6 years ago
- GIAnT, the Generic Implementation ANalysis Toolkit☆12Jul 4, 2018Updated 7 years ago
- SYCL-based Stencil Simulation Framework Targeting FPGAs☆17Aug 31, 2024Updated last year
- A Modular System for Flexible, High-Performance Traffic http://www.ict-mplane.eu/☆24Oct 4, 2018Updated 7 years ago
- License Plate Recognition C++ Class (Using OpenCV library)☆27Feb 19, 2014Updated 12 years ago
- OFDM通信系统，发送机、信道、接收机设计及simulink实现，BPSK、QAM多种调制方式☆38Dec 7, 2022Updated 3 years ago
- FPGA-supported OpenCV Prototype (Added new FPGA OpenCV module, modified opencv-core to support Altera FPGA callstream)☆17Aug 24, 2017Updated 8 years ago
- Reference implementations of the GIMLI permutation☆15Jul 9, 2017Updated 8 years ago
- Designing means to communicate as an SPI master, being a part of AXI interface☆19Sep 14, 2023Updated 2 years ago
- ☆20May 8, 2012Updated 13 years ago
- FGPU is a soft GPU architecture general purpose computing☆61Nov 9, 2020Updated 5 years ago
- ☆12Apr 8, 2021Updated 4 years ago
- VHDL Library for implementing common DSP functionality.☆31Oct 5, 2018Updated 7 years ago
- Random test code☆20Jun 26, 2025Updated 8 months ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆20Jul 23, 2022Updated 3 years ago
- This project contains a set of scripts to facilitate the setup of the Jetson Nano for doing Deep Learning with Tensorflow 2.0 (and also w…☆11Oct 25, 2019Updated 6 years ago
- Co-processor for whole genome alignment☆13Jun 6, 2020Updated 5 years ago
- A VHDL implementation of SipHash☆13Feb 19, 2015Updated 11 years ago