Implemented Darius IP (originally target PYNQ) of convolution and maxpool on Xilinx FPGA with SDK
☆16Dec 2, 2018Updated 7 years ago
Alternatives and similar repositories for Xilinx-Deep-Learning-Nexys4
Users that are interested in Xilinx-Deep-Learning-Nexys4 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- "智能公交系统电子站牌设计"毕业设计单片机和微信小程序代码☆14Jan 11, 2023Updated 3 years ago
- Implementation of Canny Edge Detection on Cyclone IV. To run project you need Quartus and ModelSim.☆15Mar 29, 2020Updated 6 years ago
- Xilinx Deep Learning IP☆95May 10, 2021Updated 5 years ago
- OpenAI-compatible HTTP server for OmniVoice text-to-speech☆64Jun 8, 2026Updated last week
- 开发环境是Windows 10, Quartus。硬件开发语言是Verilog。 利用FPGA开发的智能小车，分为两个部分，控制器部分和小车部分，通过蓝牙信号进行连接。 控制部分可以通过加速度传感器检测手势，从而控制小车的前后左右。 加速度传感器还可以检测人体是否摔倒…☆14Mar 10, 2019Updated 7 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- implementation in verilog rtl for an FPGA to detect the presence of a face in an image☆12Mar 12, 2021Updated 5 years ago
- 正点原子开拓者&新起点FPGA开发板例程☆15Nov 29, 2019Updated 6 years ago
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆14Mar 30, 2023Updated 3 years ago
- Nexys 4 DDR Artix-7☆11Jun 15, 2018Updated 8 years ago
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- In this project, Canny edge detection, one of the efficient edge detection algorithms is implemented on a Zedboard FPGA using verilog. Th…☆26Oct 15, 2021Updated 4 years ago
- 使用肤色颜色空间建模+连通域处理及分析和Harr-cascade 方法进行人脸检测。1建立多种肤色模型，结合数学形态学滤波，完成人脸检测； 2利用Matlab 自带的计算机视觉系统工具箱实现单人及多人的人脸检测。☆13Nov 23, 2018Updated 7 years ago
- CK workflow, portable packages and other artifacts for the ReQuEST-ASPLOS'18 submission:☆12Jan 16, 2019Updated 7 years ago
- The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))☆11Sep 27, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Various projects for the Nexys4DDR board from Digilent☆130Aug 30, 2023Updated 2 years ago
- FPGA-based Fully Digital FM Transmitter using SDR (Software-Defined Radio) techniquies as up-converter using hpsdm, comb filters, cordic …☆16Mar 15, 2021Updated 5 years ago
- Using verilog-HDL, xilinx-ISE and nexys-iii. A shooting game based on VGA and ps/2 keyboard.☆19Dec 1, 2014Updated 11 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- Realization of Lane Detection on CPU and implementation on FPGA using SDSOC and VIVADO. Key terms for used softwares: C++, OpenCV, xfOpe…☆21Apr 13, 2020Updated 6 years ago
- This repository contains the project proposal,code and final report for the implementation of the paper "Parallax Tolerant Image Stitchin…☆14Nov 29, 2018Updated 7 years ago
- ☆12Feb 15, 2024Updated 2 years ago
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 3 years ago
- 在FPGA上部署深度学习项目☆25Mar 18, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆13Feb 13, 2021Updated 5 years ago
- MP3 Player developed on FPGA(DIGILENT NEXYS 4 DDR)☆16Feb 11, 2019Updated 7 years ago
- ☆11Jan 21, 2019Updated 7 years ago
- A face mask detector based on STM32F103ZET6 and Yolov4.☆22Mar 28, 2023Updated 3 years ago
- C++ HDL (Hardware Description Language)☆48Updated this week
- Caffe1 튜토리얼☆13Dec 20, 2017Updated 8 years ago
- ☆18Oct 3, 2016Updated 9 years ago
- 一种基于FPGA平台的实时视频去雾系统项目代码，其中bit流文件可以直接下载到PYNQ-Z2开发板上，通过usb和hdmi设备输入有雾视频，将去雾后的视频输出到显示屏上。c++源代码部分是我们的去雾IP核的源代码。☆20Nov 24, 2019Updated 6 years ago
- RISC-V CPU in SystemVerilog & Custom Migen-based SoC Generator☆10Dec 29, 2021Updated 4 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Modulation and Arbitrary Waveform Generator☆20Feb 16, 2021Updated 5 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 6 years ago
- ☆12Feb 16, 2019Updated 7 years ago
- betrusted.io main SoC design☆14Jan 30, 2020Updated 6 years ago
- 集成电路设计大赛ARM杯作品，获得2021年ARM企业杯☆16Sep 26, 2021Updated 4 years ago
- Ethernet MAC for the Digilent Nexys 4 DDR FPGA.☆31Aug 21, 2018Updated 7 years ago
- STM32 TDS PH Temperature DS18B20 水质检测☆33May 28, 2018Updated 8 years ago