f4pga / prjtrellisLinks
Documenting the Lattice ECP5 bit-stream format.
☆58Updated 2 years ago
Alternatives and similar repositories for prjtrellis
Users that are interested in prjtrellis are comparing it to the libraries listed below
Sorting:
- VHDL library 4 FPGAs☆184Updated this week
- Ultimate ECP5 development board☆115Updated 6 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated 2 months ago
- Virtual Development Board☆64Updated 4 years ago
- Project X-Ray Database: XC7 Series☆73Updated 4 years ago
- Logicbone ECP5 Development Board☆119Updated 5 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- CoreScore☆171Updated 2 months ago
- This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.☆45Updated 2 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 6 months ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆112Updated last year
- FPGA Odysseus with ULX3S☆69Updated 2 years ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆111Updated 3 weeks ago
- FuseSoC standard core library☆151Updated last month
- Example LED blinking project for your FPGA dev board of choice☆189Updated last week
- Nitro USB FPGA core☆86Updated last year
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆186Updated last year
- Small footprint and configurable SPI core☆46Updated last month
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- This repository contains small example designs that can be used with the open source icestorm flow.☆155Updated 4 years ago
- USB Serial on the TinyFPGA BX☆139Updated 4 years ago
- Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs☆122Updated 4 years ago
- Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.☆81Updated 3 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆47Updated last year
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 7 years ago
- An Open Source configuration of the Arty platform☆131Updated last year
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆86Updated last week
- SoC based on VexRiscv and ICE40 UP5K☆161Updated 9 months ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆82Updated 5 years ago
- Featherweight RISC-V implementation☆53Updated 3 years ago