SEAL-UCSB / NVSim
NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
☆109Updated 6 years ago
Alternatives and similar repositories for NVSim:
Users that are interested in NVSim are comparing it to the libraries listed below
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆61Updated last year
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆191Updated last year
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆177Updated 4 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆52Updated 3 years ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆151Updated 2 years ago
- PUMA Compiler☆28Updated 4 years ago
- gem5 Tips & Tricks☆65Updated 4 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆66Updated 4 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆42Updated 4 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆33Updated 2 years ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆68Updated 2 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆60Updated 3 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆228Updated 2 years ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆42Updated last year
- gem5 repository to study chiplet-based systems☆68Updated 5 years ago
- A list of our chiplet simulaters☆26Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆66Updated 5 years ago
- RTL implementation of Flex-DPE.☆97Updated 4 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆124Updated 8 months ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆23Updated last year
- A pre-RTL, power-performance model for fixed-function accelerators☆173Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆67Updated 3 years ago
- Fast and accurate DRAM power and energy estimation tool☆146Updated last week
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆66Updated last year
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 5 years ago
- ☆20Updated last month
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆102Updated 2 years ago
- A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems☆158Updated 2 months ago
- ASIC simulation of Multi-ported Memory Module. And it can offer SRAM-based dual-port basic building block to support multiple read/write …☆16Updated 8 years ago
- Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of follow…☆22Updated last month