SEAL-UCSB / NVSim
NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
☆113Updated 6 years ago
Alternatives and similar repositories for NVSim:
Users that are interested in NVSim are comparing it to the libraries listed below
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆64Updated 2 years ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆198Updated 2 years ago
- PUMA Compiler☆28Updated 4 years ago
- gem5 Tips & Tricks☆68Updated 5 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆183Updated 4 years ago
- ☆28Updated 4 months ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆159Updated 2 years ago
- gem5 repository to study chiplet-based systems☆72Updated 6 years ago
- An Open-Source Tool for CGRA Accelerators☆64Updated last week
- Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of follow…☆23Updated 4 months ago
- RTL implementation of Flex-DPE.☆99Updated 5 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆109Updated 2 years ago
- Fast and accurate DRAM power and energy estimation tool☆156Updated this week
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆79Updated 3 weeks ago
- STONNE: A Simulation Tool for Neural Networks Engines☆130Updated 10 months ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆42Updated last year
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆64Updated 3 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆67Updated last month
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆71Updated 5 years ago
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆71Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- Hybrid Memory Cube Simulation & Research Infrastructure☆16Updated last year
- some knowleage about SystemC/TLM etc.☆24Updated last year
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆64Updated 9 months ago
- Processing-In-Memory (PIM) Simulator☆159Updated 4 months ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆232Updated 2 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆136Updated 2 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆67Updated last year