thu-nics / CLAP-triangle-countingLinks
[DATE'23] The official code for paper <CLAP: Locality Aware and Parallel Triangle Counting with Content Addressable Memory>
☆23Updated last month
Alternatives and similar repositories for CLAP-triangle-counting
Users that are interested in CLAP-triangle-counting are comparing it to the libraries listed below
Sorting:
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆38Updated 2 years ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆34Updated last month
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆36Updated 3 years ago
- ☆29Updated 3 years ago
- Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines☆21Updated 3 years ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆33Updated last year
- Artifact for USENIX ATC'23: TC-GNN: Bridging Sparse GNN Computation and Dense Tensor Cores on GPUs.☆50Updated last year
- This repo is to collect the state-of-the-art GNN hardware acceleration paper☆54Updated 4 years ago
- ☆91Updated last year
- ☆65Updated 4 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- PUMA Compiler☆29Updated 5 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆93Updated 4 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆66Updated 2 years ago
- ☆33Updated 4 years ago
- ☆36Updated last year
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆93Updated last year
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆73Updated 2 years ago
- ☆28Updated 2 years ago
- A graph linear algebra overlay☆51Updated 2 years ago
- ☆21Updated 3 months ago
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆46Updated last year
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆63Updated 5 months ago
- Serpens is an HBM FPGA accelerator for SpMV☆21Updated last year
- NeuraChip Accelerator Simulator☆14Updated last year
- PyGim is the first runtime framework to efficiently execute Graph Neural Networks (GNNs) on real Processing-in-Memory systems. It provide…☆31Updated 5 months ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆86Updated last year
- ☆187Updated last year
- PIMeval simulator and PIMbench suite☆33Updated last month
- ☆110Updated last year