Quantized training method for RRAM-based systems.
☆12Sep 24, 2018Updated 7 years ago
Alternatives and similar repositories for quantized-rram-net
Users that are interested in quantized-rram-net are comparing it to the libraries listed below
Sorting:
- Architecture for RRAM multilevel programming☆17Sep 6, 2018Updated 7 years ago
- ReRAM implementation on CNN☆18Dec 30, 2018Updated 7 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆25Jan 10, 2022Updated 4 years ago
- Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators☆11Apr 9, 2019Updated 6 years ago
- Memristor Reinforcement Learning☆27Mar 19, 2019Updated 6 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆36May 19, 2022Updated 3 years ago
- Physical memristor/RRAM/resistive switching device SPICE compact model, that is able to accurately fit both unipolar/bipolar devices sett…☆48Oct 31, 2019Updated 6 years ago
- Source code for DESTINY, a tool for modeling 2D and 3D caches designed with SRAM, eDRAM, STT-RAM, ReRAM and PCM. This is mirror of follow…☆27Dec 18, 2024Updated last year
- Simulations using Brian for memristor-based neural networks using STDP learning☆27May 25, 2016Updated 9 years ago
- memristor 1T1R array based CNN and ConvLSTM☆70Jul 9, 2019Updated 6 years ago
- A simulator for RRAM-based neural processor engine.☆35Mar 6, 2018Updated 7 years ago
- MNSIM version 1.1. We have uploaded a high-level modeling tool and please use this version: https://github.com/Zhu-Zhenhua/MNSIM_Python☆12Dec 12, 2019Updated 6 years ago
- Lock circuitgraphs using various logic locking techniques☆11May 2, 2023Updated 2 years ago
- mumax3 with sot(spin orbit torque)☆11Mar 3, 2023Updated 3 years ago
- A WIP library to control B1500 and similar testers via the VISA protocol, built on pyvisa☆11Nov 4, 2016Updated 9 years ago
- SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor Aided loGIC☆15Jan 23, 2020Updated 6 years ago
- SDR-Transceiver☆10Dec 30, 2019Updated 6 years ago
- A library that you can use to build spiking neural network brains for your Arduino robots! Largely allows you to follow the paradigms of …☆10Nov 21, 2015Updated 10 years ago
- RTL code for the DPU chip designed for irregular graphs☆13May 30, 2022Updated 3 years ago
- A series of simulations organized as homework assignments that were part of the course on Neuromorphic Engineering at IIT Bombay (course …☆10Jul 19, 2016Updated 9 years ago
- [TVLSI 2025] ACiM Inference Simulation Framework in "ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits"☆27Sep 9, 2025Updated 5 months ago
- ☆12Apr 6, 2025Updated 10 months ago
- Stencila for Python☆17Aug 3, 2018Updated 7 years ago
- An emulator of General Vision's CM1K neuromorphic chip, including modeling experiments using several popular public datasets☆11Jun 2, 2017Updated 8 years ago
- PyTorch code for full quantization of DNN using BCGD☆14Jul 24, 2019Updated 6 years ago
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆13Apr 1, 2020Updated 5 years ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- Telluride neuromorphic project on event-based image classification☆10Dec 21, 2016Updated 9 years ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆11May 2, 2022Updated 3 years ago
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆48Jun 2, 2017Updated 8 years ago
- bitfusion verilog implementation☆12Feb 21, 2022Updated 4 years ago
- Tool for parsing an integrated circuit test file from STIL to the particular file format of a Teradyne tester.☆15May 17, 2018Updated 7 years ago
- Supplementary Material for "Neuromorphic Silicon Photonics"☆11Apr 13, 2017Updated 8 years ago
- A basic implementation of a SAT attack on logic locking.☆13Jun 30, 2021Updated 4 years ago
- MESMERIC: A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies☆10Oct 1, 2020Updated 5 years ago
- 一些可能用到的功能，在STM32上，暂时包含取随机数RND、DES/3DES运算DES、哈希计算SHA1☆12Nov 7, 2018Updated 7 years ago
- Python tools for generating and testing SPICE netlists/waveforms involving crossbar memory arrays in various configurations☆14Jan 22, 2020Updated 6 years ago
- ☆18May 1, 2024Updated last year
- SPICE based IBIS simulation☆16Jan 2, 2025Updated last year