qingyangqing / quantized-rram-net
Quantized training method for RRAM-based systems.
☆12Updated 6 years ago
Alternatives and similar repositories for quantized-rram-net:
Users that are interested in quantized-rram-net are comparing it to the libraries listed below
- Architecture for RRAM multilevel programming☆16Updated 6 years ago
- A simulator for RRAM-based neural processor engine.☆30Updated 6 years ago
- Benchmark framework of synaptic device technologies for a simple neural network☆28Updated 4 years ago
- ReRAM implementation on CNN☆18Updated 6 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆46Updated 3 years ago
- Models and training scripts for "LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures" (ISCAS 2021).☆14Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆42Updated 4 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆33Updated 2 years ago
- Physical memristor/RRAM/resistive switching device SPICE compact model, that is able to accurately fit both unipolar/bipolar devices sett…☆39Updated 5 years ago
- Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators☆11Updated 5 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆32Updated 5 years ago
- Stochastic Computing for Deep Neural Networks☆30Updated 4 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆79Updated 2 years ago
- MNSIM_Python_v1.0. The former circuits-level version link: https://github.com/Zhu-Zhenhua/MNSIM_V1.1☆34Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆21Updated 3 years ago
- Benchmark framework of 3D integrated CIM accelerators for popular DNN inference, support both monolithic and heterogeneous 3D integration☆21Updated 3 years ago
- ☆44Updated last year
- Compact LSTM inference kernel (CLINK) designed in C/HLS for FPGA implementation.☆17Updated 5 years ago
- Framework for radix encoded SNN on FPGA☆13Updated 3 years ago
- A collection of research papers on SRAM-based compute-in-memory architectures.☆24Updated last year
- Benchmark framework of synaptic device technologies for a simple neural network☆20Updated 4 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆53Updated 3 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆21Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆32Updated 5 years ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆60Updated 2 years ago
- Spiking Neural Network RTL Implementation☆49Updated 3 years ago
- ☆17Updated 3 years ago
- ☆14Updated 3 years ago
- I will share some useful or interesting papers about neuromorphic processor☆19Updated 2 months ago
- Benchmark framework of synaptic device technologies for a simple neural network☆195Updated 3 years ago