ElimuMichael / Memristor
ReRAM implementation on CNN
☆18Updated 6 years ago
Alternatives and similar repositories for Memristor:
Users that are interested in Memristor are comparing it to the libraries listed below
- Architecture for RRAM multilevel programming☆16Updated 6 years ago
- Models and training scripts for "LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures" (ISCAS 2021).☆14Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆46Updated 3 years ago
- Modeling of memristors in LTSpise environment☆24Updated 3 months ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆21Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆32Updated 5 years ago
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆60Updated 2 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆32Updated 5 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆35Updated 4 years ago
- Framework for radix encoded SNN on FPGA☆13Updated 3 years ago
- A simulator for RRAM-based neural processor engine.☆30Updated 6 years ago
- ☆14Updated 3 years ago
- ☆17Updated 3 years ago
- Benchmark framework of synaptic device technologies for a simple neural network☆28Updated 4 years ago
- Spiking Neural Network RTL Implementation☆49Updated 3 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆53Updated 3 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆49Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆42Updated 4 years ago
- A repository FPGA-friendly SNN models☆32Updated 3 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆79Updated 2 years ago
- Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators☆11Updated 5 years ago
- ☆44Updated last year
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆10Updated last year
- Quantized training method for RRAM-based systems.☆12Updated 6 years ago
- Stochastic Computing for Deep Neural Networks☆30Updated 4 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆56Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆133Updated 11 months ago
- ☆24Updated 2 years ago
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆26Updated 4 months ago
- A Spiking Neuron Network Project in Verilog Implementation☆20Updated 6 years ago