ElimuMichael / MemristorLinks
ReRAM implementation on CNN
☆18Updated 6 years ago
Alternatives and similar repositories for Memristor
Users that are interested in Memristor are comparing it to the libraries listed below
Sorting:
- Architecture for RRAM multilevel programming☆17Updated 7 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆60Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆34Updated 5 years ago
- Modeling of memristors in LTSpise environment☆33Updated last month
- This repository includes the Resistive Random Access Memory (RRAM) Compiler which is designed in the context of the research project of D…☆69Updated 2 years ago
- ☆19Updated 4 years ago
- Framework for radix encoded SNN on FPGA☆14Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆52Updated 4 years ago
- Spiking Neural Network RTL Implementation☆59Updated 4 years ago
- ☆17Updated 4 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆65Updated 2 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆38Updated 5 years ago
- ☆18Updated last year
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆193Updated 6 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆86Updated 3 years ago
- SNN on FPGA☆11Updated 3 years ago
- Models and training scripts for "LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures" (ISCAS 2021).☆16Updated 4 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 6 months ago
- Stochastic Computing for Deep Neural Networks☆33Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆73Updated 6 months ago
- CrossSim: accuracy simulation of analog in-memory computing☆172Updated 5 months ago
- a Computing In Memory emULATOR framework☆14Updated last year
- A simulator for RRAM-based neural processor engine.☆33Updated 7 years ago
- A repository FPGA-friendly SNN models☆33Updated 4 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- Benchmark framework of synaptic device technologies for a simple neural network☆212Updated 3 years ago
- A Simulation Framework for Memristive Deep Learning Systems☆161Updated last year
- ☆92Updated 5 years ago