PyLCARS / PythonUberHDL
Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL
☆34Updated 6 years ago
Related projects ⓘ
Alternatives and complementary repositories for PythonUberHDL
- Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.☆39Updated 9 months ago
- Utilities for MyHDL☆17Updated 11 months ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆35Updated 5 years ago
- Yosys Plugins☆20Updated 5 years ago
- VHDL Library for implementing common DSP functionality.☆27Updated 6 years ago
- A current mode buck converter on the SKY130 PDK☆26Updated 3 years ago
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆20Updated 8 years ago
- Verification Utilities for MyHDL☆17Updated last year
- Extensible FPGA control platform☆54Updated last year
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- A tool for merging the MyHDL workflow with Vivado☆19Updated 4 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆42Updated 9 years ago
- Wishbone interconnect utilities☆37Updated 5 months ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆25Updated 9 months ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆34Updated 3 years ago
- A padring generator for ASICs☆22Updated last year
- Open Source ZYNQ Board☆30Updated 9 years ago
- Example code in Verilog for the Blackice II FPGA☆26Updated 5 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- ☆29Updated 3 years ago
- MyHDL hardware design language encased in the tasty PygMyHDL wrapper.☆19Updated last year
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆40Updated 7 months ago
- IP-core package generator for AXI4/Avalon☆21Updated 5 years ago
- JESD204B core for Migen/MiSoC☆36Updated 3 years ago
- understanding the tinyfpga bootloader☆24Updated 6 years ago
- Torc: Tools for Open Reconfigurable Computing☆39Updated 7 years ago
- Wishbone controlled I2C controllers☆44Updated last week
- Using the TinyFPGA BX USB code in user designs☆49Updated 5 years ago
- Solving Sudokus using open source formal verification tools☆15Updated 2 years ago