Alternatives and similar repositories for PySpiceExsamples:

Users that are interested in PySpiceExsamples are comparing it to the libraries listed below

• danielvilas / PySpice-Library
  Library of componentes for PySpice
  ☆13Updated 5 years ago
• capn-freako / PyBERT
  Serial communication link bit error rate tester simulator, written in Python.
  ☆102Updated 3 months ago
• KenKundert / flicker-noise
  How to correctly write a flicker-noise model for RF simulation.
  ☆19Updated 2 years ago
• matthuszagh / pyems
  High-level python interface to OpenEMS with automatic mesh generation
  ☆85Updated 6 months ago
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆45Updated 2 years ago
• Qucs / ADMS
  ADMS is a code generator for the Verilog-AMS language
  ☆96Updated 2 years ago
• Isotel / mixedsim
  Hardware Design Tool - Mixed Signal Simulation with Verilog
  ☆76Updated last month
• ignamv / ngspyce
  Python bindings for ngspice simulation engine
  ☆66Updated 4 years ago
• yrrapt / caravel_amsat_txrx_ic
  ☆30Updated 3 years ago
• FMCHUB / Lib_Altium
  Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard
  ☆42Updated 3 years ago
• yrrapt / analogue_design_example
  An example of analogue design using open source IC design tools
  ☆29Updated 3 years ago
• Open-RFlab / Open-RFlab
  RF electronics engineering ecosystem
  ☆25Updated 2 years ago
• yrrapt / amsat_txrx_ic
  An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)
  ☆70Updated 3 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 3 years ago
• hugodiasg / asitic-example
  ☆11Updated 3 months ago
• quartiq / redpid
  migen + misoc + redpitaya = digital servo
  ☆36Updated 6 years ago
• Lenty / SLiCAP_python
  Open-source version of SLiCAP, implemented in python
  ☆35Updated last month
• Open-RFlab / octave-openems-hll
  openEMS High-level layer
  ☆17Updated 2 years ago
• PyLCARS / PythonUberHDL
  Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL
  ☆35Updated 6 years ago
• dreoilin / pygmid
  A python3 gm/ID starter kit
  ☆44Updated 4 months ago
• Nubis-Communications / SignalIntegrity
  Python tools for signal integrity applications
  ☆138Updated this week
• capn-freako / PyAMI
  Python package for IBIS-AMI model development and testing
  ☆27Updated 3 months ago
• westonb / sky130-analog
  Analog and power building blocks for sky130 pdk
  ☆20Updated 3 years ago
• wulffern / aic2023
  Advanced integrated circuits 2023
  ☆29Updated 10 months ago
• tclarke / sky130radio
  components and examples for creating radio ICs using the open skywater 130nm PDK
  ☆18Updated 4 years ago
• mbalestrini / gdsiistl
  Converts GDSII files to STL files.
  ☆36Updated last year
• gdsfactory / skywater130
  skywater 130nm pdk
  ☆26Updated 3 months ago
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆56Updated 2 months ago
• RedPitaya / RedPitaya-FPGA
  Repository for FPGA projects
  ☆45Updated 3 months ago
• westonb / open-pmic
  A current mode buck converter on the SKY130 PDK
  ☆26Updated 3 years ago