Alternatives and similar repositories for minetest_pnr

Users that are interested in minetest_pnr are comparing it to the libraries listed below

• stefanpie / sa-placer
  ☆16Updated last year
• pepijndevos / seqpu
  A bit-serial CPU
  ☆19Updated 6 years ago
• shacron / sled
  Sled System Emulator
  ☆28Updated last month
• YosysHQ / prjtrellis-db
  Project Trellis database
  ☆14Updated 2 months ago
• thoughtpolice / yosys-bluespec
  Yosys plugin for synthesis of Bluespec code
  ☆15Updated 4 years ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆74Updated this week
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago
• CHERIoT-Platform / cheriot-sail
  Sail code model of the CHERIoT ISA
  ☆48Updated this week
• tomahawkins / verilog
  A Verilog parser for Haskell.
  ☆36Updated 4 years ago
• gatecat / hrt
  Hot Reconfiguration Technology demo
  ☆41Updated 3 years ago
• q3k / qfc
  Migrated to Codeberg
  ☆18Updated 3 years ago
• gatecat / subprime
  ☆16Updated 4 years ago
• amaranth-lang / amaranth-yosys
  WebAssembly-based Yosys distribution for Amaranth HDL
  ☆28Updated 3 weeks ago
• jowinter / dmacu
  Minimal CPU Emulator Powered by the ARM PL080 DMA Controller
  ☆36Updated last year
• oxidecomputer / quartz
  Soft-logic designs and HAL libraries for various subsystems found in Oxide hardware.
  ☆15Updated this week
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• swetland / gateware
  A collection of little open source FPGA hobby projects
  ☆50Updated 5 years ago
• CTSRD-CHERI / beri
  The BERI and CHERI processor and hardware platform
  ☆50Updated 8 years ago
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆30Updated last week
• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆19Updated 2 years ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆50Updated 10 months ago
• stephenrkell / donald
  The Mickey Mouse of dynamic linkers
  ☆16Updated 3 weeks ago
• jix / sortnetopt
  Lower Size Bounds for Sorting Networks
  ☆46Updated 5 years ago
• BigEd / XSOC-xr16
  System-on-a-Chip for FPGA, with xr16 RISC core and LCC port
  ☆12Updated 8 years ago
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆25Updated 8 years ago
• CTSRD-CHERI / qemu
  QEMU with support for CHERI
  ☆63Updated last week
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆61Updated last week
• sifiveinc / wake
  The SiFive wake build tool
  ☆91Updated this week
• awygle / waggle
  Rust proof-of-concept for GPU waveform rendering
  ☆13Updated 5 years ago
• foshardware / lsc
  Libre Silicon Compiler
  ☆22Updated 4 years ago