Place & Router for Minetest
☆18Nov 5, 2022Updated 3 years ago
Alternatives and similar repositories for minetest_pnr
Users that are interested in minetest_pnr are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 1st Testwafer for LibreSilicon☆15May 24, 2019Updated 7 years ago
- ☆18Jul 22, 2020Updated 6 years ago
- ☆16Aug 21, 2019Updated 7 years ago
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated last year
- The PE for the second generation CGRA (garnet).☆18Oct 27, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Another tutorial for writing a Forth interpreter in assembly☆21Oct 8, 2017Updated 9 years ago
- Reference Hardware Implementations of Bit Extract/Deposit Instructions☆26Oct 31, 2017Updated 9 years ago
- A Chrome extension that boost your paper writing (especially the literature review part).☆11May 6, 2019Updated 7 years ago
- Blocking pipelined db interface for Postgres on the JVM☆10Mar 27, 2026Updated 7 months ago
- ☆21Jan 31, 2026Updated 9 months ago
- ☆15Sep 8, 2022Updated 4 years ago
- ☆10Nov 8, 2019Updated 6 years ago
- The RTL source for AnyCore RISC-V☆33Mar 18, 2022Updated 4 years ago
- Relaxed Rust (for cats)☆14Nov 20, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆22Jul 31, 2019Updated 7 years ago
- testing spring-boot quarkus and micronaut for jar size and response time for a simple controller, rust and dotnet and golang☆15Updated this week
- ☆15Apr 12, 2018Updated 8 years ago
- Generate graphviz dot files from InfiniBand topology dumps.☆17Feb 11, 2024Updated 2 years ago
- ☆27Dec 28, 2024Updated last year
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 9 years ago
- A plugin for the commercial IDA Pro disassembler that warns users if they leave their instance idling for too long.☆30Jul 17, 2026Updated 3 months ago
- 10-stage out-of-order RV64IMAFDC CPU☆11Oct 28, 2026Updated last week
- VT220-compatible console on Cyclone IV EP4CE55F23I7☆43Jun 28, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Implementation of a proposed method to improve constrained random simulation☆16Feb 22, 2019Updated 7 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆12Apr 28, 2026Updated 6 months ago
- Tool for messing around with Apple GPU assembly☆28Jan 24, 2021Updated 5 years ago
- Quarkus Doma Extension☆11Jul 23, 2026Updated 3 months ago
- Educational materials and tooling for digital HDL synthesis in Python with myHDL☆36Sep 24, 2018Updated 8 years ago
- Utilities building on top of Rust's async primitives.☆24Jun 13, 2019Updated 7 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- RISC-V RV32I CPU written in verilog☆10Jul 11, 2020Updated 6 years ago
- A RISC-V TestRIG Verification Engine based on QuickCheck☆12Oct 5, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A mock framework for use with SVUnit☆19Jun 27, 2023Updated 3 years ago
- A configurable processing element for deep neural network accelerators☆10Sep 22, 2018Updated 8 years ago
- ☆11Jun 29, 2021Updated 5 years ago
- Chisel artifacts developed under IBM's involvement with the DARPA PERFECT program☆32Sep 17, 2025Updated last year
- e300 and u500 devkits☆10Nov 15, 2020Updated 5 years ago
- Joker TV (USB) FPGA verilog/vhdl code☆16May 19, 2026Updated 5 months ago
- RISC-V 32-bit core for MCCI Catena 4710☆10Jul 31, 2019Updated 7 years ago