☆57Sep 4, 2025Updated 7 months ago
Alternatives and similar repositories for CodeV
Users that are interested in CodeV are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [IJCAI 2024] QiMeng-CPU-v1: Automated CPU Design by Learning from Input-Output Examples☆28May 4, 2025Updated 11 months ago
- [DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers☆39Jul 9, 2025Updated 9 months ago
- [AAAI 2025] The official code of the paper "InverseCoder: Unleashing the Power of Instruction-Tuned Code LLMs with Inverse-Instruct"(http…☆14Jul 10, 2024Updated last year
- ☆43Jan 6, 2026Updated 3 months ago
- RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects - IEEE LAD'24☆33Jun 5, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆35Apr 13, 2025Updated 11 months ago
- ☆22Dec 7, 2023Updated 2 years ago
- Verilog evaluation benchmark for large language model☆399Jul 14, 2025Updated 8 months ago
- A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.☆278Feb 9, 2025Updated last year
- ☆55Oct 8, 2024Updated last year
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- ☆14Oct 8, 2024Updated last year
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD'24, NAACL'25)☆48May 21, 2025Updated 10 months ago
- Equivalence checking with Yosys☆59Mar 31, 2026Updated last week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆44May 29, 2025Updated 10 months ago
- This is the Github Repo for the paper: VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generati…☆23Sep 25, 2025Updated 6 months ago
- ☆45May 18, 2024Updated last year
- ☆143Mar 11, 2026Updated 3 weeks ago
- LLM4HWDesign Starting Toolkit☆19Oct 4, 2024Updated last year
- Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)☆38Jun 17, 2025Updated 9 months ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆146Jul 23, 2025Updated 8 months ago
- Basic chisel difftest environment for RTL design (WIP☆20Mar 8, 2025Updated last year
- Taiwei-3D-Flow☆43Updated this week
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- ☆44Dec 16, 2025Updated 3 months ago
- A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.☆11Aug 22, 2021Updated 4 years ago
- TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)☆42Feb 23, 2026Updated last month
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆36Aug 13, 2024Updated last year
- This repo includes XiangShan's function units☆30Feb 14, 2026Updated last month
- 南京大学计算机系2024春季学期数字逻辑与计算机组成课程实验☆17Jun 25, 2024Updated last year
- ☆203Oct 17, 2024Updated last year
- ☆275Jul 8, 2024Updated last year
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- 国科大 并发数据结构与多核编程☆18Jan 25, 2019Updated 7 years ago
- ☆40Dec 28, 2023Updated 2 years ago
- MAGE: A Multi-Agent Engine for Automated RTL Code Generation☆96Apr 11, 2025Updated 11 months ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- ☆11Apr 16, 2023Updated 2 years ago
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆52Jan 20, 2026Updated 2 months ago
- LiteX-based gateware for LimeSDR boards.☆19Updated this week