magicYang1573 / llm-hardware-test-generationLinks
☆31Updated 11 months ago
Alternatives and similar repositories for llm-hardware-test-generation
Users that are interested in llm-hardware-test-generation are comparing it to the libraries listed below
Sorting:
- ☆14Updated 9 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆50Updated 3 weeks ago
- Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs☆31Updated 7 months ago
- ☆46Updated 8 months ago
- Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)☆42Updated 6 months ago
- This is a python repo for flattening Verilog☆18Updated last month
- An open-source benchmark for generating design RTL with natural language☆112Updated 7 months ago
- This is a repo to store circuit design datasets☆18Updated last year
- ☆43Updated 3 weeks ago
- 关于移植模型至gemmini的文档☆27Updated 3 years ago
- ☆24Updated 2 months ago
- ☆22Updated 2 months ago
- OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection(ICCAD 2024)☆19Updated 8 months ago
- A toolchain for rapid design space exploration of chiplet architectures☆52Updated last month
- ☆13Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆79Updated 3 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速 器☆53Updated 5 years ago
- ☆31Updated last year
- ☆22Updated last year
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR'25)☆17Updated 2 months ago
- ☆29Updated last month
- ☆18Updated 2 years ago
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆57Updated 3 years ago
- ☆20Updated last month
- ☆24Updated 2 months ago
- ☆72Updated 2 months ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆16Updated last year
- The open-sourced version of BOOM-Explorer☆40Updated 2 years ago
- A new LLM solution for RTL code generation, achieving state-of-the-art performance in non-commercial solutions and outperforming GPT-3.5.☆203Updated 4 months ago
- Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation (ICCAD 2024)☆23Updated last week