IAMAl / ML-Hardware-CollectionsLinks
News and Paper Collections for Machine Learning Hardware
☆22Updated 2 weeks ago
Alternatives and similar repositories for ML-Hardware-Collections
Users that are interested in ML-Hardware-Collections are comparing it to the libraries listed below
Sorting:
- A DSL for Systolic Arrays☆82Updated 7 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆49Updated 9 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆174Updated last week
- ☆64Updated 5 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆24Updated 4 years ago
- NeuraLUT-Assemble☆46Updated 3 months ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆62Updated 2 months ago
- Fork of upstream onnxruntime focused on supporting risc-v accelerators☆88Updated 2 years ago
- A Toy-Purpose TPU Simulator☆19Updated last year
- ☆22Updated 3 years ago
- ☆38Updated 8 months ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆59Updated 7 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 4 years ago
- RISC-V Matrix Specification☆23Updated last year
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆64Updated 5 months ago
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆46Updated 6 months ago
- ☆40Updated 8 months ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆60Updated 4 years ago
- ☆89Updated this week
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆69Updated 2 months ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- ☆85Updated 2 years ago
- ☆61Updated this week
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆71Updated 2 years ago
- ☆35Updated last year
- PyTorch model to RTL flow for low latency inference☆131Updated last year
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆114Updated 2 years ago