The template for VLSI project
☆29Mar 3, 2023Updated 3 years ago
Alternatives and similar repositories for vlsi_project
Users that are interested in vlsi_project are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [DAC2024] Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration☆10Oct 31, 2024Updated last year
- HDCP cipher engine for the NeTV2 FPGA☆18Nov 23, 2016Updated 9 years ago
- The template for VLSI project☆26May 10, 2019Updated 7 years ago
- [FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs☆25Feb 14, 2023Updated 3 years ago
- Cortex-M0 DesignStart Wrapper☆24Aug 11, 2019Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- 32 Bit RippleCarry, CarrySkip, CarrySelect, CarryIncrement, Sklansky, Brent-Kung, Kogge-Stone and CarryLookahead adders with their intern…☆27May 1, 2018Updated 8 years ago
- Tiny matrix multiplication ASIC with 4-bit math☆12Apr 19, 2024Updated 2 years ago
- ☆31Apr 23, 2024Updated 2 years ago
- [HKUST Template] A latex template for PhD Qualification Exam (AKA PQE), especially for ECE from 2022 and later.☆14Jan 2, 2023Updated 3 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Final Project for Digital Systems Design Course, Fall 2020☆17Jul 20, 2022Updated 3 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated last year
- A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA☆24Sep 2, 2023Updated 2 years ago
- Converting Boolean expressions to CMOS Circuits☆11Oct 6, 2020Updated 5 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆35Sep 30, 2025Updated 7 months ago
- nscscc2018☆27Oct 11, 2018Updated 7 years ago
- Wishbone bridge over SPI☆11Nov 13, 2019Updated 6 years ago
- ☆16Sep 25, 2020Updated 5 years ago
- ☆37Sep 19, 2025Updated 8 months ago
- Top level for the November shuttle☆12Nov 20, 2021Updated 4 years ago
- This is a tutorial on standard digital design flow☆85May 24, 2021Updated 5 years ago
- An implementation of the paper "Dynamic Locomotion in the MIT Cheetah 3 Through Convex Model-Predictive Control" into Quad-SDK☆19Jun 29, 2024Updated last year
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Alpha研究平台☆21Sep 6, 2021Updated 4 years ago
- Symbolic Geometric Algebra with E-Graphs☆20May 2, 2026Updated 3 weeks ago
- egraph <-> json☆17Dec 29, 2025Updated 4 months ago
- Simulator for a superscalar processor with dynamic scheduling and branch prediction☆15Nov 23, 2018Updated 7 years ago
- This repository contains software for BeagleWire. Docs of BeagleWire: https://beaglewire.github.io/☆12Aug 17, 2021Updated 4 years ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- Detailed and step by step implementation of RISC-V CPU from scratch using Verilog. This work is part of my academic course EE2003, Introd…☆31May 1, 2021Updated 5 years ago
- Utility for accessing standard Linux spidev devices from userspace.☆11Jan 18, 2017Updated 9 years ago
- C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.☆10Oct 21, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆10Nov 13, 2025Updated 6 months ago
- Using e-graphs to synthesize netlists from boolean logic.☆14Jul 26, 2023Updated 2 years ago
- An experimental System-on-Chip with a custom compiler toolchain.☆60Jan 2, 2020Updated 6 years ago
- An Accelerator for Convolution layer designed with Vivado HLS.☆10Dec 4, 2020Updated 5 years ago
- Misc iCE40 specific cores☆14Feb 13, 2023Updated 3 years ago
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆30Jan 7, 2026Updated 4 months ago
- ☆37Aug 27, 2025Updated 9 months ago