Alternatives and similar repositories for zpu

Users that are interested in zpu are comparing it to the libraries listed below

• jbush001 / FPGAWhack
  Video Effects on VGA
  ☆14Updated 6 years ago
• tinyfpga / TinyFPGA-SoC
  Opensource building blocks for TinyFPGA microcontrollers and retro computers.
  ☆17Updated 7 years ago
• whitequark / bfcpu2
  A pipelined brainfuck softcore in Verilog
  ☆19Updated 10 years ago
• OpenCAPI / omi_device_ice
  An example OMI Device FPGA with 2 DDR4 memory ports
  ☆16Updated 2 years ago
• jbush001 / MiteCPU
  Minimal microprocessor
  ☆20Updated 7 years ago
• freecores / amber
  Amber ARM-compatible core
  ☆13Updated 10 years ago
• tommythorn / tinytapeout-4-bit-cpu
  A design for TinyTapeout
  ☆16Updated 2 years ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• montedalrymple / yrv
  Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.
  ☆18Updated 3 years ago
• olofk / simple_spi
  SPI core
  ☆15Updated 5 years ago
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated 2 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆21Updated 7 years ago
• mmicko / enigmaFPGA
  Enigma in FPGA
  ☆29Updated 6 years ago
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆45Updated 6 months ago
• dominiksalvet / risc63
  Custom 64-bit pipelined RISC processor
  ☆18Updated 10 months ago
• defparam / higan-verilog
  This is a higan/Verilator co-simulation example/framework
  ☆50Updated 7 years ago
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆53Updated 6 years ago
• cyrozap / iCEstick-UART-Demo
  This is a simple UART echo test for the iCEstick Evaluation Kit
  ☆38Updated 6 years ago
• ZipCPU / wbfmtx
  A wishbone controlled FM transmitter hack
  ☆23Updated last year
• pepijndevos / seqpu
  A bit-serial CPU
  ☆19Updated 5 years ago
• lawrie / saxonsoc-ulx3s-bin
  The binaries for SaxonSoc Linux and other configurations
  ☆17Updated 2 years ago
• FPGALibre / fpgacores
  IP cores for the FPGA Libre project
  ☆12Updated 7 years ago
• trabucayre / quickfeather-notes
  Notes, scripts and apps to quickfeather board
  ☆10Updated 3 years ago
• Wren6991 / DOOMSoC
  A SoC for DOOM
  ☆17Updated 4 years ago
• f32c / tools
  ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)
  ☆22Updated last month
• stacksmith / fpgasm
  FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)
  ☆53Updated 3 years ago
• mballance / fwrisc-s
  ☆10Updated 5 years ago
• Wren6991 / Hazard3-SWD-SoC
  Example Hazard3 + OpenDAP RISC-V SWD SoC integration
  ☆9Updated 2 years ago
• hdl-util / vga-text-mode
  VGA-compatible text mode functionality
  ☆17Updated 5 years ago
• jamesbowman / sincos
  Efficient implementations of the transcendental functions
  ☆27Updated 8 years ago