FOSSEE / eSim
This repository contain source code for new flow of FreeEDA now know as eSim
☆94Updated last week
Alternatives and similar repositories for eSim:
Users that are interested in eSim are comparing it to the libraries listed below
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆60Updated this week
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆34Updated this week
- A tiny Python package to parse spice raw data files.☆48Updated 2 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆80Updated 6 months ago
- ADMS is a code generator for the Verilog-AMS language☆98Updated 2 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆57Updated 3 months ago
- Custom IC Creator Simulation tools☆14Updated this week
- This repository contain source code for ngspice and ghdl integration☆30Updated 2 months ago
- How to correctly write a flicker-noise model for RF simulation.☆19Updated 2 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆42Updated 8 months ago
- Hardware Design Tool - Mixed Signal Simulation with Verilog☆76Updated 2 months ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆64Updated 3 weeks ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆18Updated 4 years ago
- Cadence Virtuoso Design Management System☆33Updated 2 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆72Updated 3 years ago
- Open-source version of SLiCAP, implemented in python☆35Updated 3 months ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆26Updated 3 weeks ago
- Open Analog Design Environment☆23Updated last year
- Some simple examples for the Magic VLSI physical chip layout tool.☆29Updated 4 years ago
- Skywater 130nm Klayout Device Generators PDK☆29Updated 8 months ago
- An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.☆22Updated 4 years ago
- Verilog-A simulation models☆64Updated 2 months ago
- Circuit simulator of the Qucs project☆27Updated 2 months ago
- Automatic generation of real number models from analog circuits☆38Updated 11 months ago
- ☆74Updated last month
- Learning to do things with the Skywater 130nm process☆76Updated 4 years ago
- mirror of ngspice repo at git://git.code.sf.net/p/ngspice/ngspice ngspice-ngspice☆198Updated this week
- skywater 130nm pdk☆27Updated last week
- Course material for a basic-level circuit design course using Xschem and ngspice☆85Updated this week
- A browser-based SPICE circuit simulator☆114Updated this week