Dmitriy0111 / nanoFOX_VHDL
A small RISC-V core (VHDL)
☆7Updated 5 years ago
Alternatives and similar repositories for nanoFOX_VHDL:
Users that are interested in nanoFOX_VHDL are comparing it to the libraries listed below
- RISC-V soft-core PEs for TaPaSCo☆18Updated 8 months ago
- LunaPnR is a place and router for integrated circuits☆46Updated 3 months ago
- ☆33Updated 2 years ago
- Open Source AES☆31Updated 10 months ago
- RISCV core RV32I/E.4 threads in a ring architecture☆32Updated last year
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆13Updated 4 years ago
- ☆23Updated this week
- Reconfigurable Binary Engine☆15Updated 3 years ago
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆12Updated 2 years ago
- Verilog Modules and Python Scripts for Creating IP Core Build Directories☆29Updated last year
- Library of open source Process Design Kits (PDKs)☆33Updated last week
- Quick'n'dirty FuseSoC+cocotb example☆18Updated 3 months ago
- Procyon is the brightest star in the constellation of Canis Minor. But it's also the name of my RISC-V out-of-order processor.☆12Updated last year
- A Python package for generating HDL wrappers and top modules for HDL sources☆30Updated this week
- AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...☆12Updated 4 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12Updated 5 years ago
- RiftCore is a 9-stage, single-issue, out-of-order 64-bits RISC-V Core, which supports RV64IMC and 3-level Cache System☆37Updated 2 years ago
- Source-Opened RISCV for Crypto☆15Updated 3 years ago
- ☆17Updated 2 years ago
- Platform Level Interrupt Controller☆36Updated 9 months ago
- DUTH RISC-V Superscalar Microprocessor☆30Updated 4 months ago
- ☆12Updated last year
- This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the sa…☆15Updated 5 years ago
- Simple UVM environment for experimenting with Verilator.☆18Updated 2 months ago
- APB Logic☆15Updated 2 months ago
- ArmleoCPU - RISC-V CPU RV64GC, SMP, Linux, Doom. Work in progress to execute first instruction with new feature set☆4Updated 2 years ago
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆19Updated 3 months ago
- YosysHQ SVA AXI Properties☆37Updated 2 years ago
- RISC-V Nox core☆62Updated 7 months ago