Repository for Hornet RISC-V Core
☆21Sep 15, 2022Updated 3 years ago
Alternatives and similar repositories for RISC-V
Users that are interested in RISC-V are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı☆19May 27, 2023Updated 3 years ago
- Kasırga Sayısal Görüntü İşleme Kategorisi Hızlandırıcı Tasarımı☆15May 27, 2023Updated 3 years ago
- Capture retired instructions of a RISC-V Core and compress them to a sequence of packets.☆19Mar 13, 2024Updated 2 years ago
- Clarvi simple RISC-V processor for teaching☆58Aug 25, 2017Updated 8 years ago
- 5-Stage Pipelined RV32I RISC-V Core design in Verilog-2005. It has 32 GPIO pins and it is FPGA synthesible.☆24Dec 4, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…☆22Apr 13, 2023Updated 3 years ago
- Basic Data Structure Algorithm in C++☆13Nov 4, 2022Updated 3 years ago
- SystemVerilog Functional Coverage for RISC-V ISA☆36Dec 11, 2025Updated 6 months ago
- 6-stage dual-issue in-order superscalar risc-v cpu☆14May 2, 2026Updated last month
- A light-weight hardware oriented synchronous stream cipher.☆12Mar 19, 2022Updated 4 years ago
- Basic floating-point components for RISC-V processors☆12Aug 13, 2017Updated 8 years ago
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.☆17Mar 26, 2026Updated 2 months ago
- CPUs☆17Dec 21, 2020Updated 5 years ago
- ☆10Oct 25, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Matrak Verilog ile yazılmış bir RISC-V işlemcidir.☆11May 8, 2024Updated 2 years ago
- An open silicon CHERIoT Ibex microcontroller chip☆18May 23, 2025Updated last year
- KASIRGA - GUN | RV32IMCX☆12Aug 14, 2024Updated last year
- Emotiv connector for Matlab☆15Dec 11, 2020Updated 5 years ago
- fbDOOM with RISC-V Vector optimizations☆17Aug 30, 2023Updated 2 years ago
- Talking to your vehicle over the CAN bus with Python☆24Mar 10, 2022Updated 4 years ago
- This repo hold information on the open-standard OVP APIs☆20Dec 11, 2025Updated 6 months ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆37Dec 30, 2022Updated 3 years ago
- Universal Memory Interface (UMI)☆160May 13, 2026Updated last month
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Nov 27, 2024Updated last year
- Bad Apple but it's an SVG using SMIL☆14Aug 30, 2023Updated 2 years ago
- Verification Template Engine is a Jinja2-based template engine targeted at verification engineers☆14Jan 4, 2024Updated 2 years ago
- Latest in the line of the E32 processors with better/generic cache placement☆10Feb 25, 2023Updated 3 years ago
- RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT☆187Apr 4, 2026Updated 2 months ago
- A variable FPGA-based QAM transmitter with scalable mixed time and frequency domain signal processing.☆22Jan 27, 2021Updated 5 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆33Aug 20, 2022Updated 3 years ago
- 2D discrete cosine transform (DCT) of an 8x8 image in verilog HDL☆16Sep 2, 2022Updated 3 years ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆19Nov 16, 2023Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆20Aug 5, 2024Updated last year
- The VD100 development board is based on the Xilinx Versal AI Edge series chip xcve2302 and is designed with a core board and a bottom boa…☆19Jul 9, 2024Updated last year
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆21May 12, 2026Updated last month
- Motion Estimation implementation by using Verilog HDL☆13Jun 17, 2024Updated last year
- ☆16Apr 8, 2023Updated 3 years ago
- Minimal settings for ESP32 to connect to University of Michigan WiFi (MWireless/eduroam)☆17Jan 12, 2021Updated 5 years ago
- Reflection API for SystemVerilog☆14Mar 30, 2026Updated 2 months ago