Alternatives and similar repositories for OpenMIPS_CPU

Users that are interested in OpenMIPS_CPU are comparing it to the libraries listed below

• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆143Updated last year
• loongson-education / nscscc-wiki
  NSCSCC 信息整合
  ☆252Updated 4 years ago
• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆130Updated 4 years ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆44Updated 5 years ago
• AlwenXXD / nscscc2021
  龙芯杯21个人赛作品
  ☆35Updated 4 years ago
• FDUCSLG / ICS-2021Spring-FDU
  Introduction to Computer Systems (II), Spring 2021
  ☆52Updated 4 years ago
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆135Updated last year
• TheRainstorm / CO_ext_lab-CQU
  重庆大学计组（硬综）拓展实验；
  ☆21Updated 4 years ago
• nscscc2019ucas / nscscc2019ucas
  ☆35Updated 6 years ago
• cyyself / soc-simulator
  A Verilator based SoC simulator that allows you to define AXI Slave interface in software.
  ☆49Updated 3 weeks ago
• CQU-CS-LABs / CO-lab-docs-CQU
  重庆大学硬件综合设计课程实验文档
  ☆39Updated 2 months ago
• huang-jl / LLCL-MIPS
  LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…
  ☆37Updated 3 years ago
• 14010007517 / 2020NSCSCC
  Chongqing University 2020 NSCSCC
  ☆28Updated 5 years ago
• Superscalar-HIT-Core / Superscalar-HIT-Core-NSCSCC2020
  a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog
  ☆49Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆82Updated 2 years ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 5 years ago
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆39Updated 2 years ago
• oscomp / 2021oscomp-best-kernel-design-impl
  2021年OS比赛获奖赛题（文档/代码开源），可用于2022年参赛同学的学习和提高
  ☆48Updated 3 years ago
• y0fy / CO-lab-material-CQU
  重庆大学计算机组成原理、硬件综合设计实验材料
  ☆37Updated 4 years ago
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆29Updated last year
• cyyself / CDIM-SoC
  SoC for CQU Dual Issue Machine
  ☆12Updated 3 years ago
• nkgongxl / ucoreonrv
  ☆51Updated 5 years ago
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 3 years ago
• thu-cs-lab / supervisor-rv
  计算机组成原理课程 RISC-V 监控程序，支持 32 位和 64 位
  ☆125Updated last month
• z4yx / supervisor-mips32
  计算机组成原理课程32位监控程序
  ☆50Updated 5 years ago
• oscomp / testsuits-for-oskernel
  ☆139Updated last month
• HIT-MaRiver-mips / cpucore-mariver
  ☆35Updated 2 years ago
• ustb-owl / Uranus
  Uranus MIPS processor by MaxXing & USTB NSCSCC team
  ☆38Updated 5 years ago
• HUST-OS / xv6-k210
  Port XV6 to K210 board!
  ☆145Updated 4 years ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆117Updated 11 months ago