CherryYang05 / OpenMIPS_CPULinks
基于龙芯 OpenMIPS 实现一个具有 89 条指令的五级流水 CPU，使用 Verilog 语言，使用哈佛结构，包括逻辑移位指令、乘除法指令、加载存储指令、转移指令、协处理器访问指令以及异常相关在内的共89条指令。能够处理数据相关，包含流水线暂停以及延迟槽
☆20Updated 5 years ago
Alternatives and similar repositories for OpenMIPS_CPU
Users that are interested in OpenMIPS_CPU are comparing it to the libraries listed below
Sorting:
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆139Updated last year
- NSCSCC 信息整合☆251Updated 4 years ago
- 为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助☆126Updated 4 years ago
- 龙芯杯21个人赛作品☆35Updated 3 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆43Updated 4 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. （第五届龙芯杯特等奖作…☆37Updated 3 years ago
- 一生一芯的信息发布和内容网站☆132Updated last year
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆49Updated last year
- 2020龙芯杯个人赛 简易双发射60M（含ibuffer）☆40Updated 4 years ago
- Introduction to Computer Systems (II), Spring 2021☆51Updated 4 years ago
- Chongqing University 2020 NSCSCC☆28Updated 4 years ago
- ☆35Updated 5 years ago
- 重庆大学硬件综合设计课程实验文档☆39Updated 2 weeks ago
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆49Updated 9 months ago
- Port XV6 to K210 board!☆143Updated 4 years ago
- ☆135Updated last week
- 2022年龙芯杯个人赛 单发射110M（含icache）☆48Updated 2 years ago
- 《自己动手写CPU》一书附带的文件☆86Updated 7 years ago
- 重庆大学计组（硬综）拓展实验；☆21Updated 4 years ago
- ☆51Updated 4 years ago
- Naïve MIPS32 SoC implementation☆115Updated 5 years ago
- ☆35Updated last year
- ☆156Updated last week
- 2021年OS比赛获奖赛题（文档/代码开源），可用于2022年参赛同学的学习和提高☆48Updated 3 years ago
- 2021年秋季学期 南京大学ICS课程 PA实验部分☆126Updated 3 years ago
- 龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）☆61Updated last year
- ☆98Updated 8 months ago
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆174Updated 4 years ago
- CQU Dual Issue Machine☆35Updated last year
- NJU Virtual Board☆285Updated 3 weeks ago