Alternatives and similar repositories for xucpu

Users that are interested in xucpu are comparing it to the libraries listed below

• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 3 years ago
• Sevenqi7 / NSCSCC-2022
  2022龙芯杯个人赛三等奖作品
  ☆14Updated 2 years ago
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆61Updated last year
• CSerht / NSCSCC2021FinalCode
  龙芯杯2021个人赛决赛最终代码
  ☆11Updated 4 years ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 5 years ago
• 77Adog / nscscc24_single_loongarch
  2024年第八届龙芯杯 LA 个人赛二等奖参赛作品
  ☆21Updated last year
• MrAMS / NagiCore
  顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
  ☆24Updated 11 months ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆143Updated last year
• Yawei-Ding / ysyx_riscv64_cpu
  ☆70Updated 2 years ago
• cassuto / yamp-32
  NSCSCC 2020 - Yet Another MIPS Processor
  ☆14Updated 4 years ago
• Clo91eaf / PUA-MIPS
  NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
  ☆13Updated 6 months ago
• zhhangBian / BOOM_chip
  乱序双发处理器，在2024年计算机系统能力大赛CPU赛道（龙芯杯）获二等奖，全国第四
  ☆15Updated last year
• iFuProcessor / iFuCore
  ☆20Updated last year
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆30Updated last year
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆82Updated 2 years ago
• spokeyjoe / LoongArchCPU
  A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.
  ☆28Updated last year
• HIT-MaRiver-mips / cpucore-mariver
  ☆35Updated 2 years ago
• OSCPU / yosys-sta
  ☆83Updated 6 months ago
• cebarobot / UCAS-Computer-Architecture-Lab
  计算机体系结构研讨课 2020秋季 UCAS 《CPU设计实战》 工程环境及 RTL 代码合集
  ☆18Updated 4 years ago
• ffhh927 / NSCSCC-2023-mips
  2023龙芯杯mips赛道作品
  ☆14Updated last year
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• Lyncien / RISC-V-32I
  体系结构课程实验：RISC-V 32I 流水线 CPU，实现37条指令，转发，冒险检测，Cache，分支预测器
  ☆86Updated 5 years ago
• Corle-hyz / UCAS-COD-Lab
  中国科学院大学(UCAS)2020年春季学期计算机组成原理实验课作业
  ☆16Updated 3 years ago
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• yizishun / ysyx-framework
  A framework for ysyx flow
  ☆12Updated 11 months ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆44Updated 5 years ago
• FanQinFred / Cache
  重庆大学计算机学院2018级计算机体系结构cache设计
  ☆11Updated 4 years ago
• Heresyrac / Gemmini_doc
  关于移植模型至gemmini的文档
  ☆30Updated 3 years ago
• OpenXiangShan / XSAI
  A fork of Xiangshan for AI
  ☆30Updated last week
• EricJin2002 / UCAS-CA-2022
  一个单发射五级静态流水CPU，采用龙芯32位精简版指令集，支持异常和中断处理，使用AXI总线接口，已集成TLB模块
  ☆15Updated 2 years ago