panxuc / xucpuLinks
NSCSCC “龙芯杯” 2024 个人赛 LoongArch 赛道三等奖
☆10Updated last year
Alternatives and similar repositories for xucpu
Users that are interested in xucpu are comparing it to the libraries listed below
Sorting:
- 2022年龙芯杯个人赛 单发射110M(含icache)☆48Updated 3 years ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆61Updated last year
- 2022龙芯杯个人赛三等奖作品☆14Updated last year
- 龙芯杯2021个人赛决赛最终代码☆11Updated 4 years ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆40Updated 5 years ago
- 2024年第八届龙芯杯 LA 个人赛二等奖参赛作品☆22Updated last year
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆25Updated 10 months ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆143Updated last year
- A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.☆27Updated last year
- 重庆大学计算机学院2018级计算机体系结构cache设计☆11Updated 4 years ago
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆13Updated 6 months ago
- ☆70Updated 2 years ago
- A 5-level pipelined MIPS CPU with branch prediction and great cache.☆20Updated 4 years ago
- 适用于龙芯杯团队赛入门选手的应急cache模块☆29Updated last year
- 计算机体系结构研讨课 2020秋季 UCAS 《CPU设计实战》 工程环境及 RTL 代码合集☆18Updated 4 years ago
- 一个单发射五级静态流水CPU,采用龙芯32位精简版指令集,支持异常和中断处理,使用AXI总线接口,已集成TLB模块☆15Updated 2 years ago
- 复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品☆44Updated 5 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆84Updated 2 years ago
- 中国科学院大学(UCAS)2020年春季学期计算机组成原理实验课作业☆16Updated 3 years ago
- 2023龙芯杯mips赛道作品☆14Updated last year
- 复旦大学 数字逻辑与部件设计实验 2020秋☆52Updated 3 years ago
- MIPS 57条指令五级流水线cpu (verilog实现+详细注释)☆11Updated 3 years ago
- ☆35Updated 2 years ago
- 关于移植模型至gemmini的文档☆30Updated 3 years ago
- ☆20Updated last year
- NSCSCC2022龙芯杯个人赛,MIPS32,59MHz经典五级流水线架构,易于初学者阅读(计算机组成原理,自己动手写CPU)☆77Updated last year
- CPU敏捷开发框架(龙芯杯2024)☆26Updated last year
- "aura" my super-scalar O3 cpu core☆24Updated last year
- 体系结构课程实验:RISC-V 32I 流水线 CPU,实现37条指令,转发,冒险检测,Cache,分支预测器☆86Updated 5 years ago
- 乱序双发处理器,在2024年计算机系统能力大赛CPU赛道(龙芯杯)获二等奖,全国第四☆16Updated last year