CMU-SAFARI / Cache-Memory-Hog
Cache and main memory hog programs. These are programs with specific access patterns to evict the already existing cache blocks of various applications. These programs were designed to demonstrate that application performance is nearly linearly correlated with cache access rate (as shown in Section 3.1 of Subramanian et al. "The Application Slow…
☆19Updated 8 years ago
Related projects ⓘ
Alternatives and complementary repositories for Cache-Memory-Hog
- Memory System Microbenchmarks☆61Updated last year
- A fast and scalable x86-64 multicore simulator☆31Updated 3 years ago
- Creating beautiful gem5 simulations☆45Updated 3 years ago
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆19Updated 4 years ago
- SST Architectural Simulation Components and Libraries☆92Updated last week
- An unofficial mirror of the core PARSEC 3.0 benchmark suite with patches to run on x86_64 Arch Linux and generalize builds.☆99Updated 2 years ago
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆25Updated 9 years ago
- The Splash-3 benchmark suite☆42Updated last year
- gem5 Tips & Tricks☆63Updated 4 years ago
- This is a fork of zsim (see https://github.com/s5z/zsim) which integrates the NVMain main memory simulator, adding 3D stacking and non-vo…☆25Updated 9 years ago
- Benchmarks of Deep Neural Networks☆35Updated 3 years ago
- ☆53Updated 7 years ago
- This simulator models multi core systems with primary focus on the memory hierarchy. It models a trace-based out-of-order core frontend a…☆13Updated 8 years ago
- Repeated access to L2-containable loops to look for snoop filter conflicts on Intel Skylake Xeon processors.☆29Updated 6 years ago
- A low-overhead tool to periodically collect system-wide hardware performance counters on Intel64 systems.☆31Updated 2 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆36Updated last month
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆27Updated 2 months ago
- gem5 configuration for intel's skylake micro-architecture☆47Updated 2 years ago
- A survey on architectural simulators focused on CPU caches.☆16Updated 4 years ago
- A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)☆23Updated 6 years ago
- ☆18Updated 4 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆76Updated last year
- Joint HPS and ETH Repository to work towards open sourcing Scarab and Ramulator☆69Updated 6 months ago
- A Shared Memory Multithreaded Graph Benchmark Suite for Multicores☆34Updated 2 years ago
- ☆34Updated 2 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆38Updated last year
- NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories☆78Updated 5 years ago
- gem5 simulator with a gpgpu+graphics GPU model☆48Updated 4 years ago
- Haystack is an analytical cache model that given a program computes the number of cache misses.☆42Updated 5 years ago
- ThyNVM: Transparent hybrid NonVolatile Memory (NOTE: This repo is not working yet. Please refer to the old version: https://github.com/ba…☆29Updated 7 years ago