VIA-Research / uPIMulatorLinks
☆148Updated 7 months ago
Alternatives and similar repositories for uPIMulator
Users that are interested in uPIMulator are comparing it to the libraries listed below
Sorting:
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆91Updated last year
- ☆84Updated last year
- Processing-In-Memory (PIM) Simulator☆185Updated 9 months ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆88Updated 4 months ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆34Updated last month
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- PIMeval simulator and PIMbench suite☆33Updated last month
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆63Updated 9 months ago
- A Cycle-level simulator for M2NDP☆30Updated last month
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆146Updated 7 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆90Updated 4 months ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆33Updated last month
- PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is dev…☆162Updated last year
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆175Updated 2 years ago
- ☆16Updated 2 years ago
- ☆26Updated 9 months ago
- ☆42Updated 3 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆72Updated 6 months ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆38Updated 2 years ago
- ☆43Updated last month
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆44Updated last year
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆59Updated 4 months ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆55Updated last year
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆36Updated 9 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆66Updated 2 years ago
- ☆65Updated 4 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆69Updated last year
- ☆16Updated 5 months ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆83Updated 2 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆138Updated 3 months ago