CMU-SAFARI / ASMSim
This simulator models multi core systems with primary focus on the memory hierarchy. It models a trace-based out-of-order core frontend and memory scheduling policies like FRFCFS, ATLAS, TCM and slowdown estimation models, ASM and MISE. Based on the MICRO 2015 paper at https://users.ece.cmu.edu/~omutlu/pub/application-slowdown-model_micro15.pdf
☆13Updated 9 years ago
Alternatives and similar repositories for ASMSim
Users that are interested in ASMSim are comparing it to the libraries listed below
Sorting:
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 4 years ago
- ☆62Updated 3 months ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆12Updated 5 years ago
- ☆18Updated 5 years ago
- The gem5-X open source framework (based on the gem5 simulator)☆41Updated last year
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based ou…☆10Updated 9 years ago
- ☆33Updated 4 years ago
- Memory System Microbenchmarks☆62Updated 2 years ago
- An FPGA-based NetTLP adapter☆26Updated 5 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆25Updated 2 years ago
- ☆19Updated 4 years ago
- A survey of manufacturer-provided DRAM operating parameters and timings as specified by DRAM chip datasheets from between 1970 and 2021. …☆10Updated 3 years ago
- A fast and scalable x86-64 multicore simulator☆31Updated 4 years ago
- A parallel and distributed simulator for thousand-core chips☆24Updated 7 years ago
- A binary instrumentation tool to analyze load instructions in any off-the-shelf x86(-64) program. Described by Bera et al. in https://arx…☆20Updated 10 months ago
- (elastic) cuckoo hashing☆14Updated 4 years ago
- ☆15Updated 2 years ago
- ☆12Updated 9 years ago
- ☆32Updated 5 years ago
- Quick & Flexible Rack-Scale Computer Architecture Simulator☆38Updated 2 months ago
- Artifact, reproducibility, and testing utilites for gem5☆21Updated 3 years ago
- Tutorial Material from the SST Team☆19Updated last year
- ordspecsim: The Swarm architecture simulator☆24Updated 2 years ago
- SmartNIC☆14Updated 6 years ago
- A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…☆71Updated 8 months ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆32Updated last week
- Visualization tool for designing mesh Network-on-Chips (NoC) and assisting with architecture research☆11Updated last year
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆28Updated last month
- A wrapper for the SPEC CPU2006 benchmark suite.☆89Updated 4 years ago