AlexKly / Simple-Voice-Activity-Detector-using-MFCC-based-on-FPGA-KintexLinks
Voice Activity Detector based on MFCC features and DNN model
☆21Updated last year
Alternatives and similar repositories for Simple-Voice-Activity-Detector-using-MFCC-based-on-FPGA-Kintex
Users that are interested in Simple-Voice-Activity-Detector-using-MFCC-based-on-FPGA-Kintex are comparing it to the libraries listed below
Sorting:
- This is an SoC design dedicated to Keyword Spotting (KWS) based on a neural-network accelerator and the wujian100 platform.☆49Updated 4 years ago
- LMS sound filtering by Verilog☆39Updated 5 years ago
- Design some simple RISV-V cores via verilog and vivado. 复旦大学《计算机与智能处理器体系结构 AI Core and RISC Architecture》Projects☆14Updated 3 years ago
- Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…☆15Updated 4 years ago
- EE 272B - VLSI Design Project☆12Updated 3 years ago
- AXI4-Stream FIR filter IP☆17Updated 2 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆32Updated 6 years ago
- A Mel-frequency cepstrum core in FPGA☆19Updated 3 years ago
- FIR implemention with Verilog☆48Updated 6 years ago
- USB2.0 Device Controller IP Core☆11Updated last year
- Pipeline FFT Implementation in Verilog HDL☆119Updated 6 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆49Updated 7 years ago
- 一个基于AXI接口的PL端卷积加速器,可由PS端调用☆13Updated 2 years ago
- A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…☆48Updated 5 years ago
- Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …☆27Updated 4 years ago
- USB2.0 Verilog☆17Updated 6 years ago
- ☆10Updated 4 years ago
- RTL Verilog library for various DSP modules☆88Updated 3 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆55Updated 11 months ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆24Updated 2 years ago
- FPGA 同步FIFO与异步FIFO☆31Updated 6 years ago
- Single Long Short Term Memory (LSTM) cell : Verilog Implementation☆31Updated 5 years ago
- Verilog and matlab implementation of tanh using Cordic algorithm☆10Updated 5 years ago
- ☆22Updated last year
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆32Updated 4 years ago
- Cortex M0 based SoC☆73Updated 3 years ago
- SPI interface connect to APB BUS with Verilog HDL☆32Updated 3 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆70Updated 2 years ago
- A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.☆64Updated 9 months ago
- FFT algorithm for fpga☆22Updated 3 years ago