Alternatives and similar repositories for VerilogCommon

Users that are interested in VerilogCommon are comparing it to the libraries listed below

• whitequark / Yumewatari
  妖刀夢渡
  ☆59Updated 6 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated last year
• thotypous / alterajtaguart
  Altera JTAG UART wrapper for Bluespec
  ☆25Updated 11 years ago
• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆78Updated last week
• m-labs / nmigen-boards
  Board and connector definition files for nMigen
  ☆30Updated 4 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆51Updated last year
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year
• barawn / xvcd-anita
  XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.
  ☆18Updated 4 years ago
• knielsen / ice40_viewer
  ☆60Updated last year
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 8 months ago
• mattvenn / understanding-tinyfpga-bootloader
  understanding the tinyfpga bootloader
  ☆24Updated 7 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆38Updated 3 years ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 3 years ago
• projf / fpgatools
  Tools for FPGA development.
  ☆45Updated this week
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆82Updated last year
• daveshah1 / ElasticC
  lightweight open HLS for FPGA rapid prototyping
  ☆20Updated 7 years ago
• mithro / kicad-pmod
  KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…
  ☆39Updated 4 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• merlinepedra25 / Xilinx-Unprotect
  ☆51Updated 2 years ago
• ZipCPU / wbi2c
  Wishbone controlled I2C controllers
  ☆50Updated 7 months ago
• mattvenn / logLUTs
  Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.
  ☆21Updated last year
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆64Updated 3 weeks ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆92Updated 9 months ago
• ZipCPU / dbgbus
  A collection of debugging busses developed and presented at zipcpu.com
  ☆41Updated last year
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• pbing / USB
  FPGA USB 1.1 Low-Speed Implementation
  ☆34Updated 6 years ago
• daveshah1 / prjtrellis-dvi
  DVI video out example for prjtrellis
  ☆16Updated 6 years ago
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆54Updated 2 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago